Thesis Details

Koevoluční algoritmus v FPGA

Master's Thesis Student: Hrbáček Radek Academic Year: 2012/2013 Supervisor: Drahošová Michaela, Ing., Ph.D.
English title
Coevolutionary Algorithm in FPGA
Language
Czech
Abstract

This thesis deals with the design of a hardware acceleration unit for digital image filter design using coevolutionary algorithms. The first part introduces reconfigurable logic device technology that the acceleration unit is based on. The theoretical part also briefly characterizes evolutionary and coevolutionary algorithms, their principles and applications. Traditional image filter designs are compared with the biologically inspired design methods. The hardware unit presented in this thesis exploits dual MicroBlaze system extended by custom peripherals to accelerate cartesian genetic programming. The coevolutionary image filter design is accelerated up to 58 times. The hardware platform functionality in the task of impulse noise filter design and edge detector design has been empirically analyzed.

Keywords

evolutionary algorithm, coevolution, cartesian genetic programming, digital image processing, FPGA, MicroBlaze

Department
Department of Computer Systems FIT BUT
Degree Programme
Information Technology, Field of Study Computer and Embedded Systems
Files
Status
defended, grade A
Date
19 June 2013
Reviewer
Vašíček Zdeněk, doc. Ing., Ph.D.
Committee
Dvořák Václav, prof. Ing., DrSc. (DCSY FIT BUT), předseda
Kořenek Jan, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT), člen
Křivka Zbyněk, Ing., Ph.D. (DIFS FIT BUT), člen
Ryšavý Ondřej, doc. Ing., Ph.D. (DIFS FIT BUT), člen
Vlček Karel, prof. Ing., CSc. (FAI UTB), člen
Citation
HRBÁČEK, Radek. Koevoluční algoritmus v FPGA. Brno, 2013. Master's Thesis. Brno University of Technology, Faculty of Information Technology. 2013-06-19. Supervised by Drahošová Michaela. Available from: https://www.fit.vut.cz/study/thesis/15212/
BibTeX 
@mastersthesis{FITMT15212,
    author = "Radek Hrb\'{a}\v{c}ek",
    type = "Master's thesis",
    title = "Koevolu\v{c}n\'{i} algoritmus v FPGA",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2013,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/15212/"
}

Theses

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