Framework pro hardwarovou akceleraci 400Gb sítí

English title

Framework for Hardware Acceleration of 400Gb Networks

Language

Czech

Abstract

The NetCOPE framework has proven itself as a viable framework for rapid development of hardware accelerated wire-speed network applications using Network Functions Virtualization (NFV). To meet the current and future requirements of such applications the NetCOPE platform has to catch up with upcoming 400 Gigabit Ethernet. Otherwise, it may become deprecated in following years. Catching up with 400 Gigabit Ethernet brings many challenges bringing necessity of completely different way of thinking. Multiple network packets have to be processed each clock cycle requiring a new concept of processing. Advanced memory management is used to ensure constant memory complexity with respect to the number of DMA channels without any impact on performance. Thanks to that, even more than 256 completely independent DMA channels are feasible with current technology. A lot of effort was made to create the framework as generic as possible allowing deployment of 400 Gigabit Ethernet and beyond. Emphasis is put on communication between the framework and host computer via PCI Express technology. Multiple Ethernet ports are also considered. The proposed system is prepared to be deployed on the family of COMBO cards, used as a reference platform.

Keywords

400 Gigabit Ethernet, hardware acceleration, FPGA, Network Functions Virtualization(NFV), PCI Express, Direct Memory Access (DMA), SZE, DPDK

Department

Department of Computer Systems FIT BUT

Degree Programme

Information Technology, Field of Study Computer and Embedded Systems

Files

Status

defended, grade B

Date

21 June 2017

Reviewer

Matoušek Jiří, Ing., Ph.D.

Committee

Fučík Otto, doc. Dr. Ing. (DCSY FIT BUT), předseda
Češka Milan, prof. RNDr., CSc. (DITS FIT BUT), člen
Fiedler Petr, doc. Ing., Ph.D. (UAMT FEEC BUT), člen
Matoušek Petr, doc. Ing., Ph.D., M.A. (DIFS FIT BUT), člen
Ryšavý Ondřej, doc. Ing., Ph.D. (DIFS FIT BUT), člen
Zachariášová Marcela, Ing., Ph.D. (DCSY FIT BUT), člen

Citation

HUMMEL, Václav. Framework pro hardwarovou akceleraci 400Gb sítí. Brno, 2017. Master's Thesis. Brno University of Technology, Faculty of Information Technology. 2017-06-21. Supervised by Kořenek Jan. Available from: https://www.fit.vut.cz/study/thesis/19303/

BibTeX

@mastersthesis{FITMT19303,
    author = "V\'{a}clav Hummel",
    type = "Master's thesis",
    title = "Framework pro hardwarovou akceleraci 400Gb s\'{i}t\'{i}",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2017,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/19303/"
}