Application of Machine Learning Algorithms for the Generation of Checking Circuits

This thesis deals with the application of machine learning algorithms for generation of online checking circuits. It contains description of the principles of checking circuits and presents existing checking circuit implementations relevant to this thesis. The work is focused on applying checking circuits on hardware components with sequential logic. Machine learning algorithms are trained on data sets consisting of the hardware components' input-output sequences, stored as time series data. Processing time series requires special type of machine learning algorithms, which are described and compared.The individual algorithms are utilized as machine learning classifiers in order to determine their suitability for use in checking circuits. The experiments of the thesis were performed on a low-pass FIR filter. The settings of the employed machine learning classifiers are presented and the results with the individual classifier settings are evaluated. Based on the obtained results it is discussed which machine learning algorithms are applicable in checking circuits.

machine learning, checking circuits, classification, supervised learning, time series, FIR filter