Master's Theses

Year: Supervisor: 
Student:  Title: 
Keywords: 

HW/SW Codesign for the Xilinx Zynq Platform

Ac. year:2012/2013
Student:Viktorin Jan
Supervisor:Korček Pavol, Ing., Ph.D.
Reviewer:Košař Vlastimil, Ing.
Department:Department of Computer Systems FIT BUT
Branch of study:Computer and Embedded Systems (Master)
Language:czech
Status:defended - final grade A
Date:2013-06-19
Files:
Keywords
Zynq, Linux, FPGA, AXI, SoC, HW/SW Codesign
Abstract
This work describes a novel approach of HW/SW codesign on the Xilinx Zynq and similar platforms. It deals with interconnections between the Processing System (ARM Cortex-A9 MPCore) and the Programmable Logic (FPGA) to find an abstract and universal way to develop applications that are partially offloaded into the programmable hardware and that run in the Linux operating system. For that purpose a framework for HW/SW codesign on the Zynq and similar platforms is designed. No such framework is currently available.
ISO 690 Citation
VIKTORIN, Jan. HW/SW Codesign for the Xilinx Zynq Platform. Brno, 2013. Available from: http://www.fit.vutbr.cz/study/DP/DP.php?id=14453. Master's Thesis. Brno University of Technology, Faculty of Information Technology. 2013-06-19. Supervisor Korček Pavol.
BibTeX
@MASTERSTHESIS{
    author = {Jan Viktorin},
    title = {HW/SW Codesign for the Xilinx Zynq Platform},
    school = {Brno University of Technology,
		Faculty of Information Technology},
    year = {2013},
    location = {Brno, CZ},
    language = {czech},
    url = {http://www.fit.vutbr.cz/study/DP/DP.php?id=14453}
}

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