Title:

Advanced Digital Systems

Code:PCS
Ac.Year:2012/2013
Term:Winter
Study plans:
ProgramBranchYearDuty
IT-MSC-2MBI-Compulsory-Elective - group C
IT-MSC-2MBS-Elective
IT-MSC-2MGM-Compulsory-Elective - group C
IT-MSC-2MIN-Elective
IT-MSC-2MIS-Elective
IT-MSC-2MMI-Compulsory-Elective - group C
IT-MSC-2MMM-Elective
IT-MSC-2MPV2ndCompulsory
IT-MSC-2MSK-Elective
Language:Czech
Credits:5
Completion:examination (written)
Type of
instruction:
Hour/semLecturesSem. ExercisesLab. exercisesComp. exercisesOther
Hours:26001016
 ExaminationTestsExercisesLaboratoriesOther
Points:601801012
Guarantee:Fučík Otto, doc. Dr. Ing., DCSY
Lecturer:Kajan Michal, Ing., DCSY
Kořenek Jan, Ing., Ph.D., DCSY
Martínek Tomáš, Ing., Ph.D., DCSY
Instructor:Dvořák Milan, Ing., DCSY
Kajan Michal, Ing., DCSY
Faculty:Faculty of Information Technology BUT
Department:Department of Computer Systems FIT BUT
 
Learning objectives:
To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.
Description:
Overview of techniques, algorithms and technologies for digital design.  Methods for synthesis of digital circuits, minimization, espresso. Advanced synthesis methods, pipelining, retiming. ASIC and FPGA design methodology. Application of constrains. Synthesis with respect to required frequency, input/output delay, asynchronous clock domains. High level synthesis. Representation of algorithms in form of CDFG, process of scheduling, allocation, binding and RTL generation. Loop synthesis, techniques for loop unroling and pipelining. Specification of digital circuits using C/C++. Catapult C synthesis tool. Reconfigurable computing. Verification of digital circuits (OVM methodology). Low power design techniques.
Knowledge and skills required for the course:
Digital system design, basic programming skills.
Learning outcomes and competences:
The students are able to design complex constrained digital systems using contemporary design techniques, hardware description language VHDL, C/C++, and professional CAD tools.
Syllabus of lectures:
  1. Overview of techniques, algorithms and technologies for digital design.
  2. Methods for synthesis of digital circuits, minimization, espresso.
  3. Advanced synthesis methods, pipelining, retiming.
  4. ASIC and FPGA design methodology.
  5. Application of constrains. Synthesis with respect to required frequency, input/output delay, asynchronous clock domains.
  6. High level synthesis. Representation of algorithms in form of CDFG, process of scheduling, allocation, binding and RTL generation.
  7. Loop synthesis, techniques for loop unroling and pipelining.
  8. Specification of digital circuits using C/C++. Catapult C synthesis tool.
  9. Reconfigurable computing.
  10. Verification of digital circuits (OVM methodology)
  11. Low power design techniques.
Syllabus of computer exercises:
  1. Synthesis of the basic digital circuits
  2. Application of constrains
  3. Catapult C: Synthesis of the basic constructions, loop unrolling, loop pipelining.
  4. Catapult C: Interface mapping, memory blocks.
  5. Verification of digital circuits.
Syllabus - others, projects and individual work of students:
  1. Individual project, study of literature.
Fundamental literature:
  1. Gajsky D., Dutt N., Wu A., Lin S.: High-Level Synthesis: Introduction to Chip and System Design, Springer, ISBN 079239194-2, 1992
  2. Coussy P., Morawiec A.: High-Level Synthesis from Algorithm to Digital Circuit, Springer, ISBN 978-1402085871, 2008
  3. Fingeroff M.: High-Level Synthesis Blue Book, Xlibris Corporation, ISBN 978-1450097246, 2010
  4. Glasser M.: Open Verification Methodology Cookbook, Springer, New York, ISBN 978-1-4419-0967-1, 2009
  5. Rabaey J., Pedram M.: Low Power Design Methodologies, Springer, ISBN 978-0792396307, 1995
Study literature:
  1. Lecture notes in e-format
Progress assessment:
Written mid-term exam, submitted 5 PC lab reports and project in due dates.
Exam prerequisites:
Requirements for class accreditation are not defined.