Department of Information Systems

Mathematical and Engineering Approaches to Developing Reliable and Secure Concurrent and Distributed Computer Systems
Reseach leader:Češka Milan
Team leaders:Bouda Jan, Brim Luboš, Černá Ivana, Dvořák Václav, Gruska Jozef, Hanáček Petr, Holub Petr, Hruška Tomáš, Kolář Dušan, Kotásek Zdeněk, Křena Bohuslav, Křetínský Mojmír, Kučera Antonín, Matyáš Václav, Matyska Luděk, Sekanina Lukáš, Vojnar Tomáš
Team members:Bartoš Václav, Dolíhal Luděk, Holík Lukáš, Hrubá Vendula, Husár Adam, Jurnečka Peter, Konečný Filip, Korček Pavol, Koutný Jiří, Lengál Ondřej, Letko Zdeněk, Mikušek Petr, Pospíchal Petr, Přikryl Zdeněk, Samek Jan, Straka Martin, Šikulová Michaela, Šimáček Jiří, Šimková Marcela, Vašíček Zdeněk
Agency:GAČR
Code:GD102/09/H042
Start:2009
End:2012
Keywords:preparation of selected PhD students, reliability and security, concurrent and distributed systems, mathematical and engineering approaches
Annotation:
The basic aim of the project is to create an exceptional program for educating excellent PhD students from FIT BUT and FI MU within research targeted at solving current scientific problems of reliability and security of concurrent and distributed systems, which is one of the key issues of the contemporary computer science. Within this framework, the project covers a wide variety of concrete problems ranging from the design of reliable computing platforms, through the area of computer security to methods of automatic verification of computer systems. The complexity of the studied problems necessitates a use of a combination of exact mathematical approaches with heuristic engineering techniques, which is ensured in the project by a unique combination of researchers with theoretical as well as engineering backgrounds. Apart from the complex and interdisciplinary approach, another key aspect of the preparation of students in the project lies in their intense involvement in international activities, based on exceptional international relations of the project leaders.

Products

2012HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware, software, 2012
Authors: Šimková Marcela, Lengál Ondřej, Kajan Michal
 VATA: A Library for Efficient Manipulation of Non-Deterministic Tree Automata, software, 2012
Authors: Lengál Ondřej, Šimáček Jiří, Vojnar Tomáš

Publications

2012Bartoš Pavel, Kotásek Zdeněk: Reduction of Test Vectors Number based on Parasitic Capacity Extraction of Scan Chain Wires, In: Proceedings of CSE 2012 International Scientific Conference on Computer Science and Engineering, Košice, SK, FEI TU v Košiciach, 2012, p. 162-169, ISBN 978-80-8143-049-7
 Bidlo Michal, Vašíček Zdeněk: Evolution of Cellular Automata Using Instruction-Based Approach, In: 2012 IEEE World Congress on Computational Intelligence, CA, US, IEEE, 2012, p. 1060-1067, ISBN 978-1-4673-1508-1
 Čermák Martin, Koutný Jiří, Meduna Alexander: Parsing Based on n-Path Tree-Controlled Grammars, In: Theoretical and Applied Informatics, Vol. 2011, No. 23, 2012, Varšava, PL, p. 213-228, ISSN 1896-5334
 Češka Milan, Fiedor Jan, Gach Marek: A Novel Approach to Modechart Verification of Real-Time systems, In: Lecture Notes in Computer Science, Vol. 2012, No. 6927, DE, p. 559-567, ISSN 0302-9743
 Dolíhal Luděk, Hruška Tomáš, Masařík Karel: Testing of an automatically generated compiler, Review of retargetable testing system, In: International Journal on Advances in Software, Vol. 2012, No. 1, US, p. 15-26, ISSN 1942-2628
 Dolíhal Luděk, Hruška Tomáš, Masařík Karel: Usage of simulators in testing system, In: Industrial Simulation Conference, Brno, CZ, EUROSIS, 2012, p. 74-78, ISBN 978-90-77381-71-7
 Fiedor Jan, Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš: A Uniform Classification of Common Concurrency Errors, In: Lecture Notes in Computer Science, Vol. 2012, No. 6927, DE, p. 519-526, ISSN 0302-9743
 Habermehl Peter, Holík Lukáš, Rogalewicz Adam, Šimáček Jiří, Vojnar Tomáš: Forest Automata for Verification of Heap Manipulation, In: Formal Methods in System Design, Vol. 2012, No. 41, Berlin, DE, p. 83-106, ISSN 0925-9856
 Hrubá Vendula, Křena Bohuslav, Letko Zdeněk, Ur Shmuel, Vojnar Tomáš: Testing of Concurrent Programs with Genetic Algorithms, In: Lecture Notes in Computer Science, Vol. 2012, No. 7515, DE, p. 152-167, ISSN 0302-9743
 Hrubá Vendula, Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš: Testing of Concurrent Programs Using Genetic Algorithms, FIT-TR-2012-01, Brno, CZ, 2012, p. 31
 Iosif Radu, Hojjat Hossein, Konečný Filip, Kuncak Viktor, Rummer Philipp: Accelerating Interpolants, In: Lecture Notes in Computer Science, Vol. 2012, No. 7561, DE, p. 187-202, ISSN 0302-9743
 Konečný Filip, Hojjat Hossein, Iosif Radu, Kuncak Viktor, Rummer Philipp, Garnier Florent: A Verification Toolkit for Numerical Transition Systems, In: Lecture Notes in Computer Science, Vol. 2012, No. 7436, DE, p. 247-251, ISSN 0302-9743
 Konečný Filip, Iosif Radu, Bozga Marius: Deciding Conditional Termination, In: Lecture Notes in Computer Science, Vol. 2012, No. 7214, DE, p. 252-266, ISSN 0302-9743
 Korček Pavol, Sekanina Lukáš, Fučík Otto: Calibrating Traffic Simulation Model using Vehicle Travel Times, In: Lecture Notes in Computer Science, Vol. 2012, No. 7495, DE, p. 807-816, ISSN 0302-9743
 Korček Pavol, Sekanina Lukáš, Fučík Otto: Evolutionary approach to calibration of cellular automaton based traffic simulation model, In: Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems, Anchorage, US, IEEE ITSS, 2012, p. 122-129, ISBN 978-1-4673-3062-6
 Kotásek Zdeněk, Bouda Jan, Černá Ivana, Sekanina Lukáš, Vojnar Tomáš, Antoš David (editors): Mathematical and Engineering Methods in Computer Science, 7th International Doctoral Workshop, Revised Selected Papers, Berlin, DE, Springer, 2012, p. 215, ISBN 978-3-642-25928-9
 Koutný Jiří, Meduna Alexander: Tree-controlled Grammars with Restrictions Placed upon Cuts and Paths, In: Kybernetika, Vol. 48, No. 1, 2012, CZ, p. 165-175, ISSN 0023-5954
 Koutný Jiří: On Path-Controlled Grammars and Pseudoknots, In: Proceedings of the 18th Conference STUDENT EEICT 2012 Volume 3, Brno, CZ, VUT v Brně, 2012, p. 391-395, ISBN 978-80-214-4462-1
 Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš: Analysis and Testing of Concurrent Programs, Brno, CZ, FIT VUT, 2012, p. 136, ISBN 978-80-214-4464-5
 Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš: Coverage Metrics for Saturation-based and Search-based Testing of Concurrent Software, In: Lecture Notes in Computer Science, Vol. 2012, No. 7186, DE, p. 177-192, ISSN 0302-9743
 Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš: Noise Injection Heuristics for Concurrency Testing, In: Lecture Notes in Computer Science, Vol. 2012, No. 7119, DE, p. 123-131, ISSN 0302-9743
 Lengál Ondřej, Šimáček Jiří, Vojnar Tomáš: VATA: A Library for Efficient Manipulation of Non-Deterministic Tree Automata, In: Lecture Notes in Computer Science, Vol. 2012, No. 7214, DE, p. 79-94, ISSN 0302-9743
 Malačka Ondřej, Samek Jan, Zbořil František, Zbořil František V.: Decision Making and Recommendation Protocol Based on Trust for Multi-Agent Systems, In: Lecture Notes in Computer Science, Vol. 2012, No. 7138, DE, p. 280-291, ISBN 978-3-642-28508-0, ISSN 0302-9743
 Samek Jan: Důvěra a reputace v distribuovaných systémech, Brno, CZ, 2012, p. 140
 Samek Jan: Multi-contextual Trust Model for Multi-Agent Systems, In: Information Sciences and Technologies Bulletin of the ACM Slovakia, Vol. 4, No. 1, 2012, Bratislava, SK, p. 44-54, ISSN 1338-1237
 Straka Martin, Kaštil Jan, Kotásek Zdeněk, Mičulka Lukáš: Fault Tolerant System Design and SEU Injection based Testing, In: Microprocessors and Microsystems, Vol. 2013, No. 37, 2012, Amsterdam, NL, p. 155-173, ISSN 0141-9331
 Straka Martin, Kaštil Jan, Kotásek Zdeněk: FPGA-based Fault Tolerant Architectures and Their Dependability Analysis, In: MEMICS'12 -- 8th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, FI MUNI, 2012, p. 1-1
 Šikulová Michaela, Sekanina Lukáš: Acceleration of Evolutionary Image Filter Design Using Coevolution in Cartesian GP, In: Lecture Notes in Computer Science, Vol. 2012, No. 7491, DE, p. 163-172, ISBN 978-3-642-32936-4, ISSN 0302-9743
 Šimková Marcela, Lengál Ondřej: Towards Beneficial Hardware Acceleration in HAVEN: Evaluation of Testbed Architectures, FIT-TR-2012-03, Brno, CZ, FIT VUT, 2012, p. 14
 Šimková Marcela: Acceleration of Functional Verification in the Development Cycle of Hardware Systems, In: Počítačové architektury a diagnostika, Praha, CZ, ČVUT, 2012, p. 73-78, ISBN 978-80-01-05106-1
 Vašíček Zdeněk: Acceleration Methods for Evolutionary Design of Digital Circuits, Brno, CZ, 2012, p. 162
2011Abdulla Parosh A., Chen Yu-Fang, Clemente Lorenzo, Holík Lukáš, Hong Chih-Duo, Mayr Richard, Vojnar Tomáš: Advanced Ramsey-based Büchi Automata Inclusion Testing, FIT-TR-2011-03, Brno, CZ, FIT VUT, 2011, p. 45
 Abdulla Parosh A., Chen Yu-Fang, Clemente Lorenzo, Holík Lukáš, Hong Chih-Duo, Mayr Richard, Vojnar Tomáš: Advanced Ramsey-based Büchi Automata Inclusion Testing, In: Lecture Notes in Computer Science, Vol. 2011, No. 6901, DE, p. 187-202, ISSN 0302-9743
 Bartoš Pavel, Kotásek Zdeněk, Dohnal Jan: Decreasing Test Time by Scan Chain Reorganization, In: IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011, Cottbus, DE, IEEE CS, 2011, p. 371-374, ISBN 978-1-4244-9753-9
 Bartoš Pavel: Metody optimalizace propojení scan řetězce, In: Počítačové architektury a diagnostika 2011, Bratislava, SK, Vyd. STU, 2011, p. 97-102, ISBN 978-80-227-3552-0
 Bartoš Pavel: Test Time Reduction by Scan Chain Reordering, In: Proceedings of the 17th Conference STUDENT EEICT 2011, Brno, CZ, FEKT VUT, 2011, p. 564-568, ISBN 978-80-214-4273-3
 Češka Milan, Fiedor Jan, Gach Marek: A Novel Approach to Modechart Verification of Real-Time systems, In: Proceedings of the 13th International Conference on Computer Aided Systems Theory, Universidad de Las Palmas de Canaria, ES, IUCTC, 2011, p. 338-339, ISBN 978-84-693-9560-8
 Dolíhal Luděk, Hruška Tomáš: Porting of C library, Testing of generated compiler, In: InfoWare 2011, Luxembourg, LU, IARIA, 2011, p. 125-130, ISBN 978-1-61208-008-6
 Dudka Kamil, Peringer Petr, Vojnar Tomáš: An Easy to Use Infrastructure for Building Static Analysis Tools, In: Proceedings of the 13th International Conference on Computer Aided Systems Theory, Universidad de Las Palmas de Canaria, ES, IUCTC, 2011, p. 328-329, ISBN 978-84-693-9560-8
 Dvořák Václav, Jaroš Jiří: A Programmable Interconnection Network for Multiple Communication Patterns, In: Proceedings of the Sixth International Conference on Systems, ICONS 2011, St. Maarten, AN, IARIA, 2011, p. 6-11, ISBN 978-1-61208-002-4
 Fiedor Jan, Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš: A Uniform Classification of Common Concurrency Errors, In: Proceedings of the 13th International Conference on Computer Aided Systems Theory, Universidad de Las Palmas de Canaria, ES, IUCTC, 2011, p. 326-327, ISBN 978-84-693-9560-8
 Habermehl Peter, Holík Lukáš, Rogalewicz Adam, Šimáček Jiří, Vojnar Tomáš: Forest Automata for Verification of Heap Manipulation, In: Lecture Notes in Computer Science, Vol. 2011, No. 6806, DE, p. 424-440, ISSN 0302-9743
 Habermehl Peter, Holík Lukáš, Rogalewicz Adam, Šimáček Jiří, Vojnar Tomáš: Forest Automata for Verification of Heap Manipulation, FIT-TR-2011-01, Brno, CZ, FIT VUT, 2011, p. 30
 Hanáček Petr, Jurnečka Peter: Využitie grafických kariet na útoky silou, In: DSM Data Security Management, Vol. 15, No. 2, 2011, CZ, p. 10-13, ISSN 1211-8737
 Holík Lukáš, Lengál Ondřej, Šimáček Jiří, Vojnar Tomáš: Efficient Inclusion Checking on Explicit and Semi-Symbolic Tree Automata, In: Lecture Notes in Computer Science, Vol. 2011, No. 6996, DE, p. 243-258, ISSN 0302-9743
 Holík Lukáš, Lengál Ondřej, Šimáček Jiří, Vojnar Tomáš: Efficient Inclusion Checking on Explicit and Semi-Symbolic Tree Automata, FIT-TR-2011-04, Brno, CZ, FIT VUT, 2011, p. 22
 Holík Lukáš: Simulations and Antichains for Efficient Handling of Finite Automata, Brno, CZ, UITS FIT VUT, 2011, p. 128
 Korček Pavol, Sekanina Lukáš, Fučík Otto: A Scalable Cellular Automata Based Microscopic Traffic Simulation, In: Proceedings of the IEEE Intelligent Vehicles Symposium 2011 (IV11), Baden-Baden, DE, IEEE ITSS, 2011, p. 13-18, ISBN 978-1-4577-0889-3
 Korček Pavol, Sekanina Lukáš, Fučík Otto: A Scalable Cellular Automata Based Microscopic Traffic Simulation, 7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2011, p. 1, ISBN 978-80-214-4305-1
 Korček Pavol, Sekanina Lukáš, Fučík Otto: Cellular automata based traffic simulation accelerated on GPU, In: Proceedings of the 17th International Conference on Soft Computing (MENDEL2011), Brno, CZ, ÚAI FSI VUT, 2011, p. 395-402, ISBN 978-80-214-4302-0
 Korček Pavol, Sekanina Lukáš, Fučík Otto: Microscopic traffic simulation using CUDA, In: Advanced Computer Architecture and Compilation for High-Performace and Embedded Systems (ACACES 2011) Poster Abstracts, Fiuggi, IT, Academia Press, 2011, p. 207-210, ISBN 978-90-382-1798-7
 Korček Pavol: Simulácie dopravy pre dlhodobú predpoveď stavu dopravy, In: Počítačové architektury a diagnostika 2011, Bratislava, SK, FIIT STU, 2011, p. 115-120, ISBN 978-80-227-3552-0
 Koutný Jiří, Křivka Zbyněk, Meduna Alexander: Pumping Properties of Path-Restricted Tree-Controlled Languages, In: 7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, VUT v Brně, 2011, p. 61-69, ISBN 978-80-214-4305-1
 Malačka Ondřej, Samek Jan, Zbořil František, Zbořil František V.: Decision Making and Recommendation Protocol Based on Trust for Multi-Agent Systems, In: Proceedings of Trust, Reputation and User Modeling Workshop (TRUM 2011), Girona, ES, 2011, p. 33-40
 Matoušek Jiří, Korček Pavol: Precise IPv4/IPv6 Packet Generator Based on NetCOPE Platform, In: IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011, Cottbus, DE, IEEE CS, 2011, p. 319-324, ISBN 978-1-4244-9753-9
 Mikušek Petr, Tomec Martin, Dvořák Václav: A Cascade Decomposition of Application-Specific Systems, In: MEMICS Proc., Brno, CZ, VUT v Brně, 2011, p. 78-85, ISBN 978-80-214-4305-1
 Přikryl Zdeněk, Křoustek Jakub, Hruška Tomáš, Kolář Dušan, Masařík Karel, Husár Adam: Design and Simulation of High Performance Parallel Architectures Using the ISAC Language, In: GSTF International Journal on Computing, Vol. 1, No. 2, 2011, Singapur, SG, p. 97-106, ISSN 2010-2283
 Přikryl Zdeněk, Křoustek Jakub, Hruška Tomáš, Kolář Dušan: Fast Just-In-Time Translated Simulator for ASIP Design, In: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Cottbus, DE, IEEE CS, 2011, p. 279-282, ISBN 978-1-4244-9753-9
 Přikryl Zdeněk, Křoustek Jakub, Hruška Tomáš, Kolář Dušan: Fast Translated Simulation of ASIPs, In: OpenAccess Series in Informatics (OASIcs), Vol. 16, No. 1, 2011, Wadern, DE, p. 93-100, ISSN 2190-6807
 Přikryl Zdeněk: Advanced Methods of Microprocessor Simulation, In: Information Sciences and Technologies Bulletin of the ACM Slovakia, Vol. 3, No. 3, 2011, Bratislava, SK, p. 1-13, ISSN 1338-1237
 Samek Jan, Malačka Ondřej, Zbořil František, Hanáček Petr: Multi-Agent Experimental Framework with Hierarchical Model of Trust in Contexts for Decision Making, In: Proceeding of the 2nd International Conference on Computer Modelling and Simulation, Brno, CZ, UITS FIT VUT, 2011, p. 128-136, ISBN 978-80-214-4320-4
 Vašíček Zdeněk, Bidlo Michal, Sekanina Lukáš, Glette Kyrre: Evolutionary Design of Efficient and Robust Switching Image Filters, In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, Los Alamitos, US, IEEE CS, 2011, p. 192-199, ISBN 978-1-4577-0599-1
 Vašíček Zdeněk, Bidlo Michal: Evolutionary Design of Robust Noise-Specific Image Filters, In: 2011 IEEE Congress on Evolutionary Computation, New Orleans, US, IEEE CS, 2011, p. 269-276, ISBN 978-1-4244-7834-7
 Vašíček Zdeněk, Sekanina Lukáš: Evolutionary Optimization of Complex Digital Circuits, In: 7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2011, p. 1, ISBN 978-80-214-4305-1
 Vašíček Zdeněk, Sekanina Lukáš: Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware, In: Genetic Programming and Evolvable Machines, Vol. 12, No. 3, 2011, Berlin, DE, p. 305-327, ISSN 1389-2576
 Zemčík Pavel, Přibyl Bronislav, Žádník Martin, Korček Pavol: Fast and Energy Efficient Image Processing Algorithms using FPGA, In: Proceedings of the 21th Conference on Field Programmable Logic and Applications Workshop, Chania, GR, IEEE, 2011, p. 2, ISBN 978-0-7695-4529-5
2010Abdulla Parosh A., Clemente Lorenzo, Holík Lukáš, Hong Chih-Duo, Chen Yu-Fang, Mayr Richard, Vojnar Tomáš: Simulation Subsumption in Ramsey-based Büchi Automata Universality and Inclusion Testing, FIT-TR-2010-02, Brno, CZ, FIT VUT, 2010, p. 30
 Abdulla Parosh A., Clemente Lorenzo, Holík Lukáš, Hong Chih-Duo, Chen Yu-Fang, Mayr Richard, Vojnar Tomáš: Simulation Subsumption in Ramsey-Based Büchi Automata Universality and Inclusion Testing, In: Computer Aided Verification, Berlín, DE, Springer, 2010, p. 132-147, ISBN 978-3-642-14294-9
 Abdulla Parosh A., Holík Lukáš, Chen Yu-Fang, Mayr Richard, Vojnar Tomáš: When Simulation Meets Antichains (On Checking Language Inclusion of Nondeterministic Finite (Tree) Automata), FIT-TR-2010-01, Brno, CZ, FIT VUT, 2010, p. 22
 Abdulla Parosh A., Holík Lukáš, Chen Yu-Fang, Mayr Richard, Vojnar Tomáš: When Simulation Meets Antichains (On Checking Language Inclusion of Nondeterministic Finite (Tree) Automata), In: Tools and Algorithms for the Construction and Analysis of Systems, Berlín, DE, Springer, 2010, p. 158-174, ISBN 978-3-642-12001-5
 Bidlo Michal, Slaný Karel, Vašíček Zdeněk: Sorting Network Development Using Cellular Automata, In: Evolvable Systems: From Biology to Hardware, London, GB, Springer, 2010, p. 85-96, ISBN 978-3-642-15322-8
 Bozga Marius, Iosif Radu, Konečný Filip: Fast Acceleration of Ultimately Periodic Relations, In: Computer Aided Verification, Berlin, DE, Springer, 2010, p. 227-242, ISBN 978-3-642-14294-9
 Dvořák Václav, Mikušek Petr: Design of Arbiters and Allocators Based on Multi-Terminal BDDs, In: Journal of Universal Computer Science, Vol. 16, No. 14, 2010, AT, p. 1826-1852, ISSN 0948-6968
 Fiedor Jan, Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš: A Uniform Classification of Common Concurrency Errors, FIT-TR-2010-03, Brno, CZ, 2010, p. 24
 Holík Lukáš, Šimáček Jiří: Optimizing an LTS-Simulation Algorithm, In: Computing and Informatics, Vol. 2010, No. 7, Bratislava, SK, p. 1337-1348, ISSN 1335-9150
 Husár Adam, Hruška Tomáš, Masařík Karel, Přikryl Zdeněk: Instruction Pipeline Modeling using Petri Nets, In: Proceedings of the International Workshop on Petri Nets and Software Engineering - PNSE'10, Universität Hamburg, DE, TU-HH, 2010, p. 163-164, ISBN 978-972-8692-55-1
 Husár Adam, Hruška Tomáš, Trmač Miloslav, Přikryl Zdeněk: Instruction Selection Patterns Extraction from Architecture Specification Language ISAC, In: Proceedings of the 16th Conference Student EEICT 2010 Volume 5, Brno, CZ, FIT VUT, 2010, p. 166-170, ISBN 978-80-214-4080-7
 Husár Adam, Trmač Miloslav, Hranáč Jan, Hruška Tomáš, Masařík Karel, Kolář Dušan, Přikryl Zdeněk: Automatic C Compiler Generation from Architecture Description Language ISAC, In: 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2010, p. 84-91, ISBN 978-80-87342-10-7
 Kotásek Zdeněk, Škarvada Jaroslav, Strnadel Josef: Reduction of Power Dissipation Through Parallel Optimization of Test Vector and Scan Register Sequences, In: Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Vienna, AT, IEEE CS, 2010, p. 364-369, ISBN 978-1-4244-6610-8
 Křena Bohuslav, Letko Zdeněk, Ur Shmuel, Vojnar Tomáš: A Platform for Search-Based Testing of Concurrent Software, In: PADTAD '10, Trento, IT, ACM, 2010, p. 11, ISBN 978-1-60558-823-0
 Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš, Ur Shmuel: A Platform for Search-Based Testing of Concurrent Software, 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2010, p. 1, ISBN 978-80-87342-10-7
 Letko Zdeněk: Sophisticated Testing of Concurrent Programs, In: SSBSE '10, Benevento, IT, IEEE, 2010, p. 36-40, ISBN 978-0-7695-4195-2
 Malačka Ondřej, Samek Jan, Zbořil František: Increasing Profit in Agent Business Model with Trust, In: Proceedings of the 7th EUROSIM Congress on Modelling and Simulation, Praha, CZ, VCVUT, 2010, p. 6, ISBN 978-80-01-04589-3
 Přikryl Zdeněk, Hruška Tomáš, Masařík Karel, Husár Adam: Fast Cycle-Accurate Compiled Simulator, In: 10th IFAC Workshop on Programmable Devices and Embedded Systems, PDeS 2010, Pszczyna, PL, IFAC, 2010, p. 97-102, ISBN 978-3-902661-95-1, ISSN 1474-6670
 Přikryl Zdeněk, Husár Adam, Hruška Tomáš, Masařík Karel: ASIP Design in the Lissom Project, In: ACACES 2010 - Poster Abstracts, Ghent, BE, HiPEAC, 2010, p. 105-108, ISBN 978-90-382-1631-7
 Přikryl Zdeněk, Křoustek Jakub, Hruška Tomáš, Kolář Dušan, Masařík Karel, Husár Adam: Design and Debugging of Parallel Architectures Using the ISAC Language, In: Proceedings ot the Annual International Conference on Advanced Distributed and Parallel Computing and Real-Time and Embedded Systems, Singapore, SG, GSTF, 2010, p. 213-221, ISBN 978-981-08-7656-2
 Přikryl Zdeněk, Křoustek Jakub, Hruška Tomáš, Kolář Dušan: Fast Translated Simulation of ASIPs, In: 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2010, p. 135-142, ISBN 978-80-87342-10-7
 Přikryl Zdeněk, Masařík Karel, Hruška Tomáš, Husár Adam: Generated Cycle-Accurate Profiler for C Language, In: 13th EUROMICRO Conference on Digital System Design, DSD'2010, Lille, FR, IEEE CS, 2010, p. 263-268, ISBN 978-0-7695-4171-6
 Samek Jan, Zbořil František, Malačka Ondřej: Event Driven Multi-context Trust Model, In: Proceedings of the 10th International Conference on Intelligent Systems Design and Applications, Cairo, EG, IEEE CS, 2010, p. 911-917, ISBN 978-1-4244-8135-4
 Samek Jan, Zbořil František: Algorithmic Evaluation of Trust in Multilevel Model, In: Proceedings of the 7th EUROSIM Congress on Modelling and Simulation, Praha, CZ, VCVUT, 2010, p. 90-95, ISBN 978-80-01-04589-3
 Samek Jan, Zbořil František: ContextGraph: Simulation Tool for Hierarchical Model of Trust in Context, In: Proceedings of CSE 2010 International Scientific Conference on Computer Science and Engineering, Košice, SK, TU v Košiciach, 2010, p. 265-270, ISBN 978-80-8086-164-3
 Samek Jan, Zbořil František: Hierarchical Model of Trust in Contexts, In: Networked Digital Technologies, Heidelberg, DE, Springer, 2010, p. 356-365, ISBN 978-3-642-14305-2, ISSN 1865-0929
 Straka Martin, Kaštil Jan, Kotásek Zdeněk: Fault Tolerant Structure for SRAM-based FPGA via Partial Dynamic Reconfiguration, In: 13th EUROMICRO Conference on Digital System Design, DSD'2010, Lille, FR, IEEE CS, 2010, p. 365-372, ISBN 978-0-7695-4171-6
 Straka Martin, Kaštil Jan, Kotásek Zdeněk: Generic Partial Dynamic Reconfiguration Controller for Fault Tolerant Designs Based on FPGA, In: NORCHIP 2010, Tampere, FI, IEEE CS, 2010, p. 1-4, ISBN 978-1-4244-8971-8
 Straka Martin, Kaštil Jan, Kotásek Zdeněk: Methodology for Design of Highly Dependable Systems in FPGA, In: International Scientific Conference on Computer Science and Engineering, Košice, SK, TU v Košiciach, 2010, p. 186-193, ISBN 978-80-8086-164-3
 Straka Martin, Kaštil Jan, Kotásek Zdeněk: Modern Fault Tolerant Architectures Based on Partial Dynamic Reconfiguration in FPGAs, In: Proceedings of the 2010 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems DDECS 2010, Wien, AT, IEEE CS, 2010, p. 173-176, ISBN 978-1-4244-6610-8
 Straka Martin: Metodika pro návrh číslicových systémů se zvýšenou spolehlivostí v obvodech FPGA, In: Počítačové architektury a diagnostika 2010, Brno, CZ, FIT VUT, 2010, p. 159-164, ISBN 978-80-214-4140-8
 Šimáček Jiří, Sekanina Lukáš, Stareček Lukáš: Evolutionary Design of Reconfiguration Strategies to Reduce the Test Application Time, In: Evolvable Systems: From Biology to Hardware, Berlin, DE, Springer, 2010, p. 214-225, ISBN 978-3-642-15322-8
 Vašíček Zdeněk, Sekanina Lukáš, Bidlo Michal: A Method for Design of Impulse Bursts Noise Filters Optimized for FPGA Implementations, In: DATE 2010: Design, Automation and Test in Europe, Dresden, DE, EDAA, 2010, p. 1731-1736, ISBN 978-3-9810801-6-2
 Vašíček Zdeněk, Sekanina Lukáš: Hardware Accelerator of Cartesian Genetic Programming with Multiple Fitness Units, In: Computing and Informatics, Vol. 29, No. 6, 2010, Bratislava, SK, p. 1359-1371, ISSN 1335-9150
 Vašíček Zdeněk: Využití a akcelerace evolučních technik pro návrh číslicových obvodů, In: Počítačové architektury a diagnostika 2010, Brno, CZ, FIT VUT, 2010, p. 165-170, ISBN 978-80-214-4140-8
2009Abdulla Parosh A., Bouajjani Ahmed, Holík Lukáš, Kaati Lisa, Vojnar Tomáš: Composed Bisimulation for Tree Automata, In: International Journal of Foundations of Computer Science, Vol. 20, No. 4, 2009, SG, p. 685-700, ISSN 0129-0541
 Abdulla Parosh A., Holík Lukáš, Chen Yu-Fang, Vojnar Tomáš: Mediating for Reduction (On Minimizing Alternating Büchi Automata), Brno, CZ, FIT VUT, 2009, p. 26
 Abdulla Parosh A., Holík Lukáš, Chen Yu-Fang, Vojnar Tomáš: Mediating for Reduction (On Minimizing Alternating Büchi Automata), FIT-TR-2009-02, Brno, CZ, 2009, p. 29
 Abdulla Parosh A., Holík Lukáš, Chen Yu-Fang, Vojnar Tomáš: Mediating for Reduction (On Minimizing Alternating Büchi Automata), In: IARCS Annual Conference on Foundations of Software Technology and Theoretical Computer Science (2009), Wadern, DE, DROPS, 2009, p. 1-12, ISBN 978-3-939897-13-2
 Abdulla Parosh A., Holík Lukáš, Kaati Lisa, Vojnar Tomáš: A Uniform (Bi-)Simulation-Based Framework for Reducing Tree Automata, In: ELECTRONIC NOTES IN THEORETICAL COMPUTER SCIENCE, Vol. 2009, No. 251, US, p. 27-48, ISSN 1571-0661
 Bidlo Michal, Vašíček Zdeněk: Comparison of the Uniform and Non-Uniform Cellular Automata-Based Approach to the Development of Combinational Circuits, In: Proceedings 2009 NASA/ESA Conference on Adaptive Hardware and Systems, Los Alamitos, US, IEEE CS, 2009, p. 423-430, ISBN 978-0-7695-3714-6
 Bidlo Michal, Vašíček Zdeněk: Development of Combinational Circuits Using Non-Uniform Cellular Automata: Initial Results, In: Genetic and Evolutionary Computation, New York, US, ACM, 2009, p. 1839-1840, ISBN 978-1-60558-325-9
 Bidlo Michal, Vašíček Zdeněk: Investigating Gate-Level Evolutionary Development of Combinational Multipliers Using Enhanced Cellular Automata-Based Model, In: Proc. of 2009 IEEE Congress on Evolutionary Computation, NA, US, IEEE CIS, 2009, p. 2241-2248, ISBN 978-1-4244-2958-5
 Bozga Marius, Habermehl Peter, Iosif Radu, Konečný Filip, Vojnar Tomáš: Automatic Verification of Integer Array Programs, In: Computer Aided Verification, Berlin, DE, Springer, 2009, p. 157-172, ISBN 978-3-642-02657-7
 Bozga Marius, Habermehl Peter, Iosif Radu, Konečný Filip, Vojnar Tomáš: Automatic Verification of Integer Array Programs, TR-2009-2, Grenoble, FR, VERIMAG, 2009, p. 49
 Češka Milan, Hýsek Jiří, Janoušek Vladimír: Model-Based Design and Verification of Reactive Systems, In: Lecture Notes in Computer Science, Vol. 2009, No. 5717, DE, p. 865-872, ISBN 978-3-642-04771-8, ISSN 0302-9743
 Holík Lukáš, Šimáček Jiří: Optimizing an LTS-Simulation Algorithm, FIT-TR-2009-03, Brno, CZ, 2009, p. 17
 Holík Lukáš, Šimáček Jiří: Optimizing an LTS-Simulation Algorithm, In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Znojmo, CZ, FI MUNI, 2009, p. 93-101, ISBN 978-3-939897-15-6
 Husár Adam, Přikryl Zdeněk, Masařík Karel, Hruška Tomáš: ASIP Design using Architecture Description Language ISAC, In: ACACES 2009 - Poster Abstracts, Ghent, BE, HiPEAC, 2009, p. 137-139, ISBN 978-90-382-1467-2
 Hýsek Jiří, Češka Milan, Janoušek Vladimír: Model-Based Design and Verification of Reactive Systems, In: Computer Aided Systems Theory, Las Palmas de Gran Canaria, ES, 2009, p. 295-296, ISBN 978-84-691-8502-5
 Kotásek Zdeněk, Straka Martin: The Design of On-line Checkers and Their Use in Verification and Testing, In: Acta Electrotechnica et Informatica, Vol. 2009, No. 3, SK, p. 8-15, ISSN 1335-8243
 Mikušek Petr, Dvořák Václav: Heuristic Synthesis of MTBDDs Based On Local Width Minimization, In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Znojmo, CZ, MUNI, 2009, p. 235-235, ISBN 978-80-87342-04-6
 Mikušek Petr, Dvořák Václav: Heuristic Synthesis of Multi-Terminal BDDs Based on Local Width/Cost Minimization, In: 12th EUROMICRO Conference on Digital System Design DSD 2009, Patras, GR, IEEE CS, 2009, p. 605-608, ISBN 978-0-7695-3782-5
 Mikušek Petr: Dekompoziční techniky pro aplikačně specifické systémy, In: Počítačové architektury a diagnostika 2009, Zlín, CZ, UTB ve Zlíně, 2009, p. 118-123, ISBN 978-80-7318-847-4
 Mikušek Petr: Multi-Terminal BDD Synthesis and Applications, In: Proceedings 19th International Conference on Field Programmable Logic and Applications (FPL), Prague, CZ, IEEE CS, 2009, p. 721-722, ISBN 978-1-4244-3892-1
 Přikryl Zdeněk, Hruška Tomáš: Cycle Accurate Profiler for ASIPs, In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2009, p. 168-175, ISBN 978-80-87342-04-6
 Přikryl Zdeněk, Masařík Karel, Hruška Tomáš, Husár Adam: Fast Cycle-Accurate Interpreted Simulation, In: Tenth International Workshop on Microprocessor Test and Verification: Common Challenges and Solutions, Austin, US, ICSP, 2009, p. 9-14, ISBN 978-0-7695-4000-9
 Samek Jan, Zbořil František: Agent Reasoning Based On Trust And Reputation, In: Proceedings MATHMOD 09 Vienna - Full Papers CD Volume, Vienna, AT, ARGESIM, 2009, p. 538-544, ISBN 978-3-901608-35-3
 Straka Martin, Kotásek Zdeněk: High Availability Fault Tolerant Architectures Implemented into FPGAs, In: 12th EUROMICRO Conference on Digital System Design DSD 2009, Patras, GR, IEEE CS, 2009, p. 108-116, ISBN 978-0-7695-3782-5
 Straka Martin, Kotásek Zdeněk: Reliability Models for Fault Tolerant Architectures Based on FPGA, In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, FI MUNI, 2009, p. 239-239, ISBN 978-80-87342-04-6
 Straka Martin: Metodologie návrhu obvodů se zvýšenou spolehlivostí založených na FPGA, In: Počítačové architektury a diagnostika 2009, Zlin, CZ, UTB ve Zlíně, 2009, p. 141-146, ISBN 978-80-7318-847-4
 Vašíček Zdeněk, Bidlo Michal, Sekanina Lukáš, Torresen Jim, Glette Kyrre, Furuholmen Marcus: Evolution of Impulse Bursts Noise Filters, In: Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems, Los Alamitos, US, IEEE CS, 2009, p. 27-34, ISBN 978-0-7695-3714-6
 Vašíček Zdeněk, Sekanina Lukáš: Efficient Hardware Accelerator for Symbolic Regression Problems, In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Znojmo, CZ, MUNI, 2009, p. 192-199, ISBN 978-80-87342-04-6

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