Department of Computer Graphics and Multimedia
National Support for Project Smart Multicore Embedded SYstems |
| Reseach leader: | Zemčík Pavel |
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| Team leaders: | Hruška Tomáš, Smrž Pavel |
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| Agency: | MŠMT |
| Code: | 7H10014 |
| Start: | 2010 |
| End: | 2013 |
| Keywords: | multi-core architectures, embedded systems |
| Annotation: |
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SMECY envisions that recently emerged multi-core technologies will
rapidly develop to massively parallel computing environments, which
due
to improved performance, energy and cost properties will, in a few
years, extensively penetrate the embedded system industry sectors.
This
will affect and shape the whole business landscape, e.g. semiconductor
vendors need to be capable of offering advanced multi-core
platforms
to diverse application sectors, Intellectual Property (IP) providers
need to re-target existing and develop new solutions to be
compatible
with evolving multi-core platforms and the need of embedded system
houses, in addition to product architecture adaptations and
renewing
their system, architecture, software and hardware development processes.
The
complexity of future smart multi-core embedded systems requires
holistic system integration because of stringent constraints on e.g.
performance
and time to market that can only be mastered using a design approach
that optimizes interaction between SoC design and
Embedded Software
approaches. Therefore, many companies that traditionally have a culture
rooted in nano and microelectronics express an
urgent need in
acquiring know-how and competences in embedded software. Equally urgent
is the need of embedded system houses to be
able to transform their
current product assets to use multi-cores and at the same time to
establish development processes in order to fully
exploit them.
The
mission of the SMECY project is to develop new programming technologies
enabling the exploitation of many (100s) core architectures.
Multi-core
technologies are strategic to keep and win market shares in all areas
of embedded systems. ARTEMIS covers well most aspects of
embedded
systems, but efficient programming of multi-core architectures for
various resources-constrained embedded system applications,
such as
consumer, wireless and some transportation fields, is still a grand
challenge waiting to be solved. The goal of this ARTEMIS project is
to
launch an ambitious European initiative to allow Europe to catch up
with Asia (e.g. teams funded by JST/CREST programmes) and USA
(e.g.
PARLAB in Berkeley, Parallel@illinois and Pervasive Parallelism
Laboratory in Stanford) and to enable Europe to become the leader.
The
key outcomes of the SMECY project are programming and design methods,
multi-core programmable architectural solutions and
associated
supporting tools that enable a holistic integration of multi-core SoC
design and embedded software to master smart system design
of future
smart multi-core embedded systems in different applications, e.g.
consumer, wireless, communication and transportation. |
Publications
| 2011 | Jošth Radovan, Dubská Markéta, Herout Adam, Havel Jiří: Real-Time Line Detection Using Accelerated High-Resolution Hough Transform, In: Proceedings of SCIA 2011, LNCS, Ystad, SE, Springer, 2011, p. 784-793, ISBN 978-3-642-21226-0 |
| 2010 | Řezníček Ivo, Bařina David: Classifier creation framework for diverse classification tasks, In: Proceedings of the DT workshop, Žilina, SK, VUT v Brně, 2010, p. 3, ISBN 978-80-554-0304-5 |
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Faculty of Information Technology
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