Department of Computer Systems

Methodologies for Fault Tolerant Systems Design Development, Implementation and Verification

Reseach leader:Kotásek Zdeněk
Team leaders:Kaštil Jan, Mičulka Lukáš, Straka Martin, Strnadel Josef, Šimková Marcela
Agency:MŠMT
Code:LD12036
Start:2012
End:2015
Keywords:digital circuit, checker, fault tolerant system, SEU, simulation, generator, testing, verification, FPGA, reconfiguration, controller,
methodology
Annotation:

The project has these goals and steps of research:

1) Development and implementation of a new methodology for fault tolerant systems design into FPGA including error detection, faults localization, reconfiguration and synchronization after reconfiguration process.

2) Development and implementation of a new methodology for automated generation of diagnostic resources for on-line testing of FPGA based systems.

3) Development of techniques for the verification of fault tolerant systems quality together with SEU injector tool to be used for reconfigurable platforms.

4) Experimental evaluation of the methodology.

5) The analysis of project results.

Products

2012External SEU injector, software, 2012
Authors: Kaštil Jan

Publications

2013Strnadel Josef: Plánování úloh v systémech RT - V: zvyšování provozuschopnosti systémů, In: Automa, Vol. 19, No. 2, 2013, CZ, p. 46-49, ISSN 1210-9592
 Szurman Karel, Kaštil Jan, Straka Martin, Kotásek Zdeněk: Fault Tolerant CAN Bus Control System Implemented into FPGA, In: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2013, Karlovy Vary, CZ, IEEE CS, 2013, p. 289-292, ISBN 978-1-4673-1185-4
 Šimková Marcela, Bolchini Cristiana, Kotásek Zdeněk: Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability, In: IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Karlovy Vary, CZ, IEEE CS, 2013, p. 275-278, ISBN 978-1-4673-6133-0
2012Kaštil Jan, Straka Martin, Kotásek Zdeněk: Methodology for Increasing Reliability of FPGA Design via Partial Reconfiguration, In: The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12), Annecy, FR, Polimi, 2012, p. 1-4
 Kaštil Jan, Straka Martin, Mičulka Lukáš, Kotásek Zdeněk: Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA, In: 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, Cesme-Izmir, TR, IEEE CS, 2012, p. 250-257, ISBN 978-0-7695-4798-5
 Mičulka Lukáš, Kotásek Zdeněk: Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System, In: 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, Cesme-Izmir, TR, IEEE CS, 2012, p. 20-21, ISBN 978-3-902457-33-2
 Mičulka Lukáš: Metoda návrh systémů odolných proti poruchám do omezeného implementačního prostoru na bázi FPGA, In: Počítačové architektury & diagnostika 2012, Praha, CZ, FIT ČVUT, 2012, p. 109-115, ISBN 978-80-01-05106-1
 Straka Martin, Kaštil Jan, Kotásek Zdeněk, Mičulka Lukáš: Fault Tolerant System Design and SEU Injection based Testing, In: Microprocessors and Microsystems, Vol. 2013, No. 37, 2012, Amsterdam, NL, p. 155-173, ISSN 0141-9331
 Straka Martin, Kaštil Jan, Kotásek Zdeněk: Methodology for Reliability Analysis of FPGA-based Fault Tolerant Systems, In: CSE'2012 International Scientific Conference on Computer Science and Engineering, Košice, SK, TU v Košiciach, 2012, p. 146-153, ISBN 978-80-8143-049-7
 Straka Martin, Mičulka Lukáš, Kaštil Jan, Kotásek Zdeněk: Test Platform for Fault Tolerant Systems Design Qualities Verification, In: 15th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Tallin, EE, IEEE CS, 2012, p. 336-341, ISBN 978-1-4673-1185-4
 Strnadel Josef, Slimařík František: On Distribution and Impact of Fault Effects at Real-Time Kernel and Application Levels, In: Proceedings of the 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, Pistacaway, US, IEEE CS, 2012, p. 272-279, ISBN 978-0-7695-4798-5
 Šimková Marcela, Kaštil Jan, Kotásek Zdeněk: Verification of Fault-tolerant methodologies for FPGA Systems, In: The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12), Annecy, FR, Polimi, 2012, p. 55-58
 Šimková Marcela, Lengál Ondřej: Towards Beneficial Hardware Acceleration in HAVEN: Evaluation of Testbed Architectures, FIT-TR-2012-03, Brno, CZ, FIT VUT, 2012, p. 14
 Šimková Marcela: Acceleration of Functional Verification in the Development Cycle of Hardware Systems, In: Počítačové architektury a diagnostika, Praha, CZ, ČVUT, 2012, p. 73-78, ISBN 978-80-01-05106-1

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