Ústav počítačových systémů

Publikace

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2018CABAL Jakub, BENÁČEK Pavel, KEKELY Lukáš, KEKELY Michal, PUŠ Viktor a KOŘENEK Jan. Configurable FPGA Packet Parser for Terabit Networks with Guaranteed Wire-Speed Throughput. In: Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. New York: Association for Computing Machinery, 2018, s. 249-258. ISBN 978-1-4503-5614-5.
 CRHA Adam, ŠIMEK Václav a RŮŽIČKA Richard. Towards novel format for representation of polymorphic circuits. In: 13th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Taormina: IEEE Circuits and Systems Society, 2018, s. 1-2. ISBN 978-1-5386-5290-9.
 FIŠER Petr a ŠIMEK Václav. Optimum Polymorphic Circuits Synthesis Method. In: 13th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Taormina: IEEE Circuits and Systems Society, 2018, s. 1-6. ISBN 978-1-5386-5290-9.
 GROCHOL David a SEKANINA Lukáš. Multi-Objective Evolution of Ultra-Fast General-Purpose Hash Functions. In: European Conference on Genetic Programming. Berlin: Springer International Publishing, 2018, s. 187-202. ISBN 978-3-319-77553-1.
 LOJDA Jakub a KOTÁSEK Zdeněk. Fault Tolerance in HLS for the Purposes of Reliable System Design Automation. In: Proceedings of the 6th Prague Embedded Systems Workshop. Roztoky u Prahy: Fakulta informačních technologií ČVUT, 2018, s. 31-32. ISBN 978-80-01-06456-6.
 MRÁZEK Vojtěch a VAŠÍČEK Zdeněk. Evolutionary Design of Large Approximate Adders Optimized for Various Error Criteria. In: GECCO Companion '18 Proceedings of the Companion Publication of the 2018 on Genetic and Evolutionary Computation Conference. Kyoto: Association for Computing Machinery, 2018, s. 1-2. ISBN 978-1-4503-5764-7.
 MRÁZEK Vojtěch, SÝS Marek, VAŠÍČEK Zdeněk, SEKANINA Lukáš a MATYÁŠ Václav. Evolving Boolean Functions for Fast and Efficient Randomness Testing. In: GECCO '18 Proceedings of the 2018 on Genetic and Evolutionary Computation Conference. Kyoto: Association for Computing Machinery, 2018, s. 1-8. ISBN 978-1-4503-5618-3.
 MRÁZEK Vojtěch, VAŠÍČEK Zdeněk a SEKANINA Lukáš. Design of Quality-Configurable Approximate Multipliers Suitable for Dynamic Environment. In: Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems. Edinburgh, 2018, s. 1-8. ISBN 978-1-5386-7753-7.
 NEVORAL Jan, RŮŽIČKA Richard a ŠIMEK Václav. CMOS Gates with Second Function. In: 2018 IEEE Computer Society Annual Symposium on VLSI. Hongkong: IEEE Computer Society, 2018, s. 82-87. ISBN 978-1-5386-7099-6.
 ČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk a VOJNAR Tomáš. ADAC: Automated Design of Approximate Circuits. In: Proceedings of 30th International Conference on Computer Aided Verification (CAV'18). To appear in LNCS., 2018, s. 1-9.
 ČUDOVÁ Marta, TREEBY Bradley E. a JAROŠ Jiří. Design of HIFU Treatment Plans using Evolutionary Strategy. In: GECCO'18 Companion: Genetic and Evolutionary Computation Conference Companion. Kyoto: Association for Computing Machinery, 2018, s. 1568-1575. ISBN 978-1-4503-5764-7.
2017CRHA Adam, ŠIMEK Václav a RŮŽIČKA Richard. Synthesis tool for design of complex polymorphic circuits. In: 2017 12th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Palma de Mallorca: IEEE Circuits and Systems Society, 2017, s. 149-154. ISBN 978-1-5090-6376-5.
 FAJČÍK Martin, ZACHARIÁŠOVÁ Marcela a SMRŽ Pavel. Automation of Processor Verification Using Recurrent Neural Networks. In: 2017 18th International Workshop on Microprocessor and SOC Test and Verification (MTV). Austin, Texas: Institute of Electrical and Electronics Engineers, 2017, s. 15-20. ISBN 978-1-5386-3351-9.
 GROCHOL David a SEKANINA Lukáš. Comparison of Parallel Linear Genetic Programming Implementations. In: Recent Advances in Soft Computing: Proceedings of the 22nd International Conference on Soft Computing (MENDEL 2016) held in Brno, Czech Republic, at June 8-10, 2016. Cham: Springer International Publishing, 2017, s. 64-76. ISBN 978-3-319-58088-3.
 GROCHOL David a SEKANINA Lukáš. Multiobjective Evolution of Hash Functions for High Speed Networks. In: Proceedings of the 2017 IEEE Congress on Evolutionary Computation. San Sebastian: IEEE Computer Society, 2017, s. 1533-1540. ISBN 978-1-5090-4600-3.
 HUSA Jakub a DOBAI Roland. Designing Bent Boolean Functions With Parallelized Linear Genetic Programming. In: GECCO Companion '17 Proceedings of the Companion Publication of the 2017 on Genetic and Evolutionary Computation Conference. Berlín: Association for Computing Machinery, 2017, s. 1825-1832. ISBN 978-1-4503-4939-0.
 KEKELY Michal a KOŘENEK Jan. Packet Classification with Limited Memory Resources. In: In proceedings 2017 Euromicro Conference on Digital System Design. Vieden: Institute of Electrical and Electronics Engineers, 2017, s. 179-183. ISBN 978-1-5386-2145-5.
 KEŠNER Filip, SEKANINA Lukáš a BRÁZDIL Milan. Modular Framework for Detection of Inter-ictal Spikes in iEEG. In: The 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC'17). Los Alamos: Institute of Electrical and Electronics Engineers, 2017, s. 418-421. ISBN 978-1-5090-2809-2.
 KIDOŇ Marek a DOBAI Roland. Evolutionary design of hash functions for IP address hashing using genetic programming. In: 2017 IEEE Congress on Evolutionary Computation (CEC). San Sebastian: Institute of Electrical and Electronics Engineers, 2017, s. 1720-1727. ISBN 978-1-5090-4601-0.
 KLEPÁRNÍK Petr, ZEMČÍK Pavel a JAROŠ Jiří. Efficient Lossy Compression of Ultrasound Data. In: 2017 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT). Bilbao: Institute of Electrical and Electronics Engineers, 2017, s. 232-237. ISBN 978-1-5386-4662-5.
 KOŘENEK Jan a KEKELY Michal. Mapping of P4 Match Action Tables to FPGA. In: Preceedings of 27TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS. Ghent: Institute of Electrical and Electronics Engineers, 2017, s. 1-2. ISBN 978-90-90-30428-1.
 KRČMA Martin a KOTÁSEK Zdeněk. Approximation accuracy of different FPNN types. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Fakulta informačních technologií ČVUT, 2017, s. 81-82. ISBN 978-80-01-06178-7.
 KRČMA Martin, KOTÁSEK Zdeněk a LOJDA Jakub. Comparison of FPNNs Models Approximation Capabilities and FPGA Resources Utilization. In: Proceedings of IEEE 13th International Conference on Intelligent Computer Communication and Processing. Cluj-Nappoca: IEEE Computer Society, 2017, s. 125-132. ISBN 978-1-5386-3367-0.
 KRČMA Martin, LOJDA Jakub a KOTÁSEK Zdeněk. Triple Modular Redundancy Used in Field Programmable Neural Networks. In: Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017, s. 1-6. ISBN 978-1-5386-3298-7.
 LOJDA Jakub a KOTÁSEK Zdeněk. A Basic Approach to Fault Tolerance of Data Paths of HLS-synthesized Systems and its Evaluation. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Fakulta informačních technologií ČVUT, 2017, s. 79-80. ISBN 978-80-01-06178-7.
 LOJDA Jakub a KOTÁSEK Zdeněk. Automatizace návrhu systémů odolných proti poruchám pomocí vysokoúrovňové syntézy. In: Počítačové architektury & diagnostika 2017. Smolenice: Slovenská technická univerzita v Bratislavě, 2017, s. 59-62. ISBN 978-80-972784-0-3.
 LOJDA Jakub, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Redundant Data Types and Operations in HLS and their Use for a Robot Controller Unit Fault Tolerance Evaluation. In: Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017, s. 359-364. ISBN 978-1-5386-3298-7.
 LOJDA Jakub, PODIVÍNSKÝ Jakub, KOTÁSEK Zdeněk a KRČMA Martin. Data Types and Operations Modifications: a Practical Approach to Fault Tolerance in HLS. In: Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017, s. 273-278. ISBN 978-1-5386-3298-7.
 MATOUŠEK Jiří, ANTICHI Gianni, LUČANSKÝ Adam, MOORE Andrew W. a KOŘENEK Jan. ClassBench-ng: Recasting ClassBench After a Decade of Network Evolution. In: 2017 ACM/IEEE Symposium on Architectures for Networking and Communications Systems. Beijing: IEEE Computer Society, 2017, s. 204-216. ISBN 978-1-5090-6386-4.
 MINAŘÍK Miloš a SEKANINA Lukáš. On Evolutionary Approximation of Sigmoid Function for HW/SW Embedded Systems. In: 20th European Conference on Genetic Programming, EuroGP 2017. Berlin: Springer International Publishing, 2017, s. 343-358. ISBN 978-3-319-55696-3.
 MRÁZEK Vojtěch a VAŠÍČEK Zdeněk. Parallel Optimization of Transistor Level Circuits using Cartesian Genetic Programming. In: GECCO Companion '17 Proceedings of the Companion Publication of the 2017 on Genetic and Evolutionary Computation Conference. Berlin: Association for Computing Machinery, 2017, s. 1849-1856. ISBN 978-1-4503-4939-0.
 MRÁZEK Vojtěch, HRBÁČEK Radek, VAŠÍČEK Zdeněk a SEKANINA Lukáš. EvoApprox8b: Library of Approximate Adders and Multipliers for Circuit Design and Benchmarking of Approximation Methods. In: Proc. of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lausanne: European Design and Automation Association, 2017, s. 258-261. ISBN 978-3-9815370-9-3.
 NEVORAL Jan, ŠIMEK Václav a RŮŽIČKA Richard. Compact Library of Efficient Polymorphic Gates based on Ambipolar Transistors. In: 2017 12th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Palma de Mallorca: IEEE Circuits and Systems Society, 2017, s. 155-160. ISBN 978-1-5090-6376-5.
 NIKL Vojtěch, HRADECKÝ Michal, JAROŠ Jiří a KELEČÉNI Jakub. The investigation of the ARMv7 and Intel Haswell architectures suitability for performance and energy-aware computing. In: High Performance Computing. Cham: Springer International Publishing, 2017, s. 377-393. ISBN 978-3-319-58667-0.
 PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. The Use of Functional Verification for Monitoring Impact of Faults in SRAM-based FPGAs. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Fakulta informačních technologií ČVUT, 2017, s. 81-82. ISBN 978-80-01-06178-7.
 PODIVÍNSKÝ Jakub, LOJDA Jakub, ČEKAN Ondřej, PÁNEK Richard a KOTÁSEK Zdeněk. Reliability Analysis and Improvement of FPGA-based Robot Controller. In: Proceedings of the 2017 20th Euromicro Conference on Digital System Design. Vídeň: IEEE Computer Society, 2017, s. 337-344. ISBN 978-1-5386-2146-2.
 PÁNEK Richard. Systémy odolné proti poruchám - metodika návrhu řadiče rekonfigurace. In: Počítačové architektury & diagnostika 2017. Smolenice: Slovenská technická univerzita v Bratislavě, 2017, s. 24-27. ISBN 978-80-972784-0-3.
 SHAFIQUE Muhammad, HAFIZ Rehan, JAVED Muhammad Usama, ABBAS Sarmad, SEKANINA Lukáš, VAŠÍČEK Zdeněk a MRÁZEK Vojtěch. Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap. In: 2017 IEEE Computer Society Annual Symposium on VLSI. Los Alamitos: IEEE Computer Society Press, 2017, s. 627-632. ISBN 978-1-5090-6762-6.
 STRNADEL Josef. On Dependability Assessment of Fault Tolerant Systems by Means of Statistical Model Checking. In: Proceedings of the 2017 20th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2017, s. 352-355. ISBN 978-1-5386-2146-2.
 SZURMAN Karel a KOTÁSEK Zdeněk. State Synchronization of Faulty Soft Core Processors in Reconfigurable TMR Architecture. In: Počítačové architektúry & diagnostika 2017. Smolenice: Slovenská technická univerzita v Bratislavě, 2017, s. 51-54. ISBN 978-80-972784-0-3.
 VAŠÍČEK Zdeněk, MRÁZEK Vojtěch a SEKANINA Lukáš. Towards Low Power Approximate DCT Architecture for HEVC Standard. In: Proc. of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lausanne: European Design and Automation Association, 2017, s. 1576-1581. ISBN 978-3-9815370-9-3.
 VAŠÍČEK Zdeněk. Relaxed equivalence checking: a new challenge in logic synthesis. In: Proceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems. Dresden: IEEE Computer Society, 2017, s. 1-6. ISBN 978-1-5386-0472-4.
 VYSOCKÝ Ondřej, BESEDA Martin, ŘÍHA Lubomír, ZAPLETAL Jan, NIKL Vojtěch, LYSAGHT Michael a KANNAN Venkatesh. Evaluation of the HPC Applications Dynamic Behavior in Terms of Energy Consumption. In: PROCEEDINGS OF THE FIFTH INTERNATIONAL CONFERENCE ON PARALLEL, DISTRIBUTED, GRID AND CLOUD COMPUTING FOR ENGINEERING. Stirlingshire: Civil-Comp Press, 2017, s. 30-49. ISBN 978-1-905088-66-9.
 WIGLASZ Michal a SEKANINA Lukáš. Evolutionary Approximation of Gradient Orientation Module in HOG-based Human Detection System. In: 2017 IEEE Global Conference on Signal and Information Processing GlobalSIP 2017. Montreal: IEEE Signal Processing Society, 2017, s. 1300-1304. ISBN 978-1-5090-5989-8.
 ČEKAN Ondřej a KOTÁSEK Zdeněk. A Probabilistic Context-Free Grammar Based Random Test Program Generation. In: Proceedings of 20th Euromicro Conference on Digital System Design. Vídeň: Technische Universitaet Wien, 2017, s. 356-359. ISBN 978-1-5386-2146-2.
 ČEKAN Ondřej a KOTÁSEK Zdeněk. Random Test Stimuli Generation Based on a Probabilistic Grammar. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Fakulta informačních technologií ČVUT, 2017, s. 43-44. ISBN 978-80-01-06178-7.
 ČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk a VOJNAR Tomáš. Approximating Complex Arithmetic Circuits with Formal Error Guarantees: 32-bit Multipliers Accomplished. In: Proceedings of 36th IEEE/ACM International Conference On Computer Aided Design (ICCAD). Irvine, CA: Institute of Electrical and Electronics Engineers, 2017, s. 416-423. ISBN 978-1-5386-3093-8.
 ČUDOVÁ Marta. Framework for Planning, Running and Monitoring Cooperating Computations. In: Počítačové architektúry & diagnostika PAD 2017. Bratislava: Slovenská technická univerzita v Bratislavě, 2017, s. 20-23. ISBN 978-80-972784-0-3.
2016BARTOŠ Václav a KOŘENEK Jan. Evaluating Reputation of Internet Entities. In: Management and Security in the Age of Hyperconnectivity. Munich: Springer International Publishing, 2016, s. 132-136. ISBN 978-3-319-39813-6.
 BIDLO Michal. Evolution of Complex Emergent Behaviour in Multi-State Cellular Automata. In: Proceedings of the 2016 on Genetic and Evolutionary Computation Conference Companion. New York: Association for Computing Machinery, 2016, s. 157-158. ISBN 978-1-4503-4323-7.
 BIDLO Michal. Evolution of Generic Square Calculations in Cellular Automata. In: Proceedings of the 8th International Joint Conference on Computational Intelligence - Volume 3: ECTA. Porto: SciTePress - Science and Technology Publications, 2016, s. 94-102. ISBN 978-989-758-201-1.
 BREITENBACHER Dominik, HOMOLIAK Ivan, JAROŠ Jiří a HANÁČEK Petr. Impact of Optimization and Parallelism on Factorization Speed of SIQS. In: Proceedings of The 20th World Multi-Conference on Systemics, Cybernetics and Informatics. Orlando: The International Institute of Informatics and Systemics, 2016, s. 55-62. ISBN 978-1-941763-41-4.
 CRHA Adam. Polymorfní elektronika a metody syntézy. In: Počítačové architektury & diagnostika Česko-slovenský seminář pro studenty doktorského studia. Brno: Fakulta informačních technologií VUT v Brně, 2016, s. 93-97. ISBN 978-80-214-5376-0.
 DOBAI Roland, KOŘENEK Jan a SEKANINA Lukáš. Adaptive Development of Hash Functions in FPGA-Based Network Routers. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: IEEE Computational Intelligence Society, 2016, s. 1-8. ISBN 978-1-5090-4240-1.
 DVOŘÁČEK Petr a SEKANINA Lukáš. Evolutionary Approximation of Edge Detection Circuits. In: 19th European Conference on Genetic programming. Berlin: Springer International Publishing, 2016, s. 19-34. ISBN 978-3-319-30667-4.
 GROCHOL David a SEKANINA Lukáš. Evolutionary design of fast high-quality hash functions for network applications. In: GECCO '16 Proceedings of the 2016 on Genetic and Evolutionary Computation Conference. New York, NY: Association for Computing Machinery, 2016, s. 901-908. ISBN 978-1-4503-4206-3.
 GROCHOL David. Evoluční hardware v síťových aplikacích. In: Počítačové architektury a diagnostika PAD 2016. Bořetice: Fakulta informačních technologií VUT v Brně, 2016, s. 57-60. ISBN 978-80-214-5376-0.
 HOLÍK Lukáš, LENGÁL Ondřej, ROGALEWICZ Adam, SEKANINA Lukáš, VAŠÍČEK Zdeněk a VOJNAR Tomáš. Towards Formal Relaxed Equivalence Checking in Approximate Computing Methodology. In: 2nd Workshop on Approximate Computing (WAPCO 2016). Prague, 2016, s. 1-6.
 HRBÁČEK Radek, MRÁZEK Vojtěch a VAŠÍČEK Zdeněk. Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms. In: Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era. Istanbul: Istanbul Sehir University, 2016, s. 239-244. ISBN 978-1-5090-0335-8.
 HYRŠ Martin a SCHWARZ Josef. Advanced Parallel Copula Based EDA. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: Institute of Electrical and Electronics Engineers, 2016, s. 1-8. ISBN 978-1-5090-4239-5.
 HYRŠ Martin a SCHWARZ Josef. Kopulové EDA algoritmy. In: Počítačové architektury & diagnostika PAD 2016. Bořetice: Fakulta informačních technologií VUT v Brně, 2016, s. 105-108. ISBN 978-80-214-5376-0.
 KOŠAŘ Vlastimil a KOŘENEK Jan. Dynamically Reconfigurable Architecture with Atomic Configuration Updates for Flexible Regular Expressions Matching in FPGA. In: Proceedings of The 19th Euromicro Conference on Digital Systems Design. Limassol: IEEE Computer Society, 2016, s. 591-598. ISBN 978-1-5090-2816-0.
 KOŘENEK Jan a VIKTORIN Jan. Packet Processing on FPGA SoC with DPDK. In: 26th International Conference on Field-Programmable Logic and Applications. Lausanne: École Polytechnique Fédérale de Lausanne, 2016, s. 578-579. ISBN 978-2-8399-1844-2.
 KRČMA Martin, KOTÁSEK Zdeněk, LOJDA Jakub a KAŠTIL Jan. Comparison of FPNNs Approximation Capabilities. In: Proceedings of the Work in progress Session held in connection with DSD 2016. Limassol: Johannes Kepler University Linz, 2016, s. 1-2. ISBN 978-3-902457-46-2.
 LOJDA Jakub, PODIVÍNSKÝ Jakub, KRČMA Martin a KOTÁSEK Zdeněk. HLS-based Fault Tolerance Approach for SRAM-based FPGAs. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, s. 297-298. ISBN 978-1-5090-5602-6.
 MATOUŠEK Denis, KOŘENEK Jan a PUŠ Viktor. High-speed Regular Expression Matching with Pipelined Automata. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, s. 93-100. ISBN 978-1-5090-5602-6.
 MERTA Michal, ZAPLETAL Jan a JAROŠ Jiří. Many Core Acceleration of the Boundary Element Method. In: Proceedings of High Performance Computing in Science and Engineering. Basel: Springer International Publishing, 2016, s. 116-125. ISBN 978-3-319-40360-1.
 MRÁZEK Vojtěch a VAŠÍČEK Zdeněk. Automatic Design of Arbitrary-Size Approximate Sorting Networks with Error Guarantee. In: Power and Timing Modeling, Optimization and Simulation (PATMOS), 2016 26rd International Workshop on. Bremen: Institute of Electrical and Electronics Engineers, 2016, s. 221-228. ISBN 978-1-5090-0733-2.
 MRÁZEK Vojtěch, SARWAR Syed Shakib, SEKANINA Lukáš, VAŠÍČEK Zdeněk a ROY Kaushik. Design of Power-Efficient Approximate Multipliers for Approximate Artificial Neural Networks. In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. Austin, TX: Association for Computing Machinery, 2016, s. 811-817. ISBN 978-1-4503-4466-1.
 MRÁZEK Vojtěch. Evoluční snižování příkonu: Od obvodů na úrovni tranzistorů po neuronové sítě na čipu. In: Počítačové architektury a diagnostika PAD 2016. Bořetice: Fakulta informačních technologií VUT v Brně, 2016, s. 61-64. ISBN 978-80-214-5376-0.
 NEVORAL Jan, RŮŽIČKA Richard a MRÁZEK Vojtěch. Evolutionary Design of Polymorphic Gates Using Ambipolar Transistors. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: Institute of Electrical and Electronics Engineers, 2016, s. 1-8. ISBN 978-1-5090-4240-1.
 NEVORAL Jan. Polymorfní obvody na bázi ambipolárních tranzistorů. In: Počítačové architektury a diagnostika PAD 2016. Bořetice: Fakulta informačních technologií VUT v Brně, 2016, s. 45-48. ISBN 978-80-214-5376-0.
 NIKL Vojtěch. High Performance Computing on Low Power Devices. In: Computer achitectures and diagnostics 2016. Brno: Fakulta informačních technologií VUT v Brně, 2016, s. 81-84. ISBN 978-80-214-5376-0.
 PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub a KOTÁSEK Zdeněk. Functional Verification as a Tool for Monitoring Impact of Faults in SRAM-based FPGAs. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, s. 289-290. ISBN 978-1-5090-5602-6.
 PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub a KOTÁSEK Zdeněk. Verification of Robot Controller for Evaluating Impacts of Faults in Electro-mechanical Systems. In: Proceedings of the 19th Euromicro Conference on Digital Systems Design. Limassol: IEEE Computer Society, 2016, s. 487-494. ISBN 978-1-5090-2817-7.
 PODIVÍNSKÝ Jakub. Funkční verifikace jako nástroj pro sledování vlivu poruch na elektro-mechanický systém. In: Počítačové architektury a diagnostika PAD 2016. Bořetice - Kraví Hora: Fakulta informačních technologií VUT v Brně, 2016, s. 101-104. ISBN 978-80-214-5376-0.
 RIŠA Michal. Scheduling and Synchronization on Multicores. In: Sborník příspěvků Česko-slovenského semináře pro studenty doktorského studia Počítačové architektury & diagnostika. Brno: Fakulta informačních technologií VUT v Brně, 2016, s. 10-13. ISBN 978-80-214-5376-0.
 RŮŽIČKA Richard a TESAŘ Radek. Lets Move Polymorphism Downwards: On the Multifunctional Logic Based on Ambipolar Behaviour of Semiconductor Devices. In: Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era. Istanbul: Istanbul Sehir University, 2016, s. 275-279. ISBN 978-1-5090-0335-8.
 SEKANINA Lukáš a KAPUSTA Vlastimil. Visualisation and Analysis of Genetic Records Produced by Cartesian Genetic Programming. In: GECCO'16 Companion. New York: Association for Computing Machinery, 2016, s. 1411-1418. ISBN 978-1-4503-4323-7.
 SEKANINA Lukáš a VAŠÍČEK Zdeněk. Genetic Improvement for Approximate Computing. In: 2nd Workshop on Approximate Computing (WAPCO 2016). Prague, 2016, s. 1-2.
 SEKANINA Lukáš. Introduction to Approximate Computing: Embedded Tutorial. In: 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Košice: Institute of Electrical and Electronics Engineers, 2016, s. 90-95. ISBN 978-1-5090-2467-4.
 STRNADEL Josef a RIŠA Michal. On Analysis of Software Interrupt Limiters for Embedded Systems by Means of UPPAAL SMC. In: Proceedings of the 24th Austrian Workshop on Microelectronics. Villach: IEEE Computer Society Press, 2016, s. 45-50. ISBN 978-1-5090-1040-0.
 STRNADEL Josef. Modeling and Analysis of Fault-Tolerant Systems by Means of UPPAAL SMC: Method and Benefits. In: Informal Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Bratislava: Slovenská technická univerzita v Bratislavě, 2016, s. 32-37. ISBN 978-80-8086-256-5.
 STRNADEL Josef. On Creation and Analysis of Reliability Models by Means of Stochastic Timed Automata and Statistical Model Checking: Principle. In: Leveraging Applications of Formal Methods, Verification and Validation: Foundational Techniques. Cham: Springer International Publishing, 2016, s. 166-181. ISBN 978-3-319-47166-2. ISSN 0302-9743.
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