Detail publikace

An FPGA-Based Systolic Serial Multiplier

DVOŘÁK Václav a SLLAME Azeddien M.. An FPGA-Based Systolic Serial Multiplier. In: Proceedings of the 5th Electronic Devices and Systems Conference 1998. Brno: neznámá, 1998, s. 394-397. ISBN 80-214-1198-8.
Typ
článek ve sborníku konference
Jazyk
angličtina
Autoři
Rok
1998
Strany
394-397
Sborník
Proceedings of the 5th Electronic Devices and Systems Conference 1998
ISBN
80-214-1198-8
Vydavatel
neznámá
Místo
Brno, CZ
BibTeX
@INPROCEEDINGS{FITPUB5660,
   author = "V\'{a}clav Dvo\v{r}\'{a}k and M. Azeddien Sllame",
   title = "An FPGA-Based Systolic Serial Multiplier",
   pages = "394--397",
   booktitle = "Proceedings of the 5th Electronic Devices and Systems Conference 1998",
   year = 1998,
   location = "Brno, CZ",
   ISBN = "80-214-1198-8",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/5660"
}
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