Prof. Ing. Adam Herout, Ph.D.

HEROUT Adam and ZEMČÍK Pavel. DSP/FPGA Embedded Image Processing Accelerator Harnessed in Traffic Monitoring. Proceedings of the IWES 2006 Workshop. Heraklion, 2006.
Publication language:english
Original title:DSP/FPGA Embedded Image Processing Accelerator Harnessed in Traffic Monitoring
Title (cs):Použití vestavěného akcelerátoru zpracování obrazu v monitorování dopravy
Book:Proceedings of the IWES 2006 Workshop
Place:Heraklion, GR
image processing, embedded processing, DSP, FPGA, traffic monitoring
This contribution presents overall information about a traffic monitoring system based on image processing which employs an embedded image processing accelerator board. The system uses a set of spatially distributed sensors and video acquisition units interconnected by a computer network (both wired and wireless). The system provides means of traffic rules enforcement as well as gathering of statistical information about the traffic flow and also detects non-standard situations such as traffic jams. Several cities in the Czech Republic use this system to cope with the challenges of contemporary traffic.

Your IPv4 address:
Switch to https