Ing.

Ondřej Čekan

Ph.D.

Ph.D. student


L325 Kancelář
120061/osobní číslo VUT

Publikace

  • 2021

    LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej a KOTÁSEK Zdeněk. Accelerating Tests of Arithmetic Circuits Through On-FPGA Stimuli Generation and Their Reduction. In: International Conference on Electrical, Computer, Communications and Mechatronics Engineering, ICECCME 2021. Mauritius: Institute of Electrical and Electronics Engineers, 2021, s. 1628-1633. ISBN 978-1-6654-1262-9.
    Detail

    LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin a KOTÁSEK Zdeněk. Testing Embedded Software Through Fault Injection: Case Study on Smart Lock. In: 2021 IEEE 22nd Latin American Test Symposium, LATS 2021. Punta del Este: Institute of Electrical and Electronics Engineers, 2021, s. 80-85. ISBN 978-1-6654-2057-0.
    Detail

  • 2020

    LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin a KOTÁSEK Zdeněk. Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock. In: 2020 IEEE East-West Design and Test Symposium, EWDTS 2020 - Proceedings. Varna: Institute of Electrical and Electronics Engineers, 2020, s. 24-28. ISBN 978-1-7281-9899-6.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, PÁNEK Richard, KRČMA Martin a KOTÁSEK Zdeněk. Automatic Design of Reliable Systems Based on the Multiple-choice Knapsack Problem. In: Proceedings - 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2020. Novi Sad: Institute of Electrical and Electronics Engineers, 2020, s. 1-4. ISBN 978-1-7281-9938-2.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, ČEKAN Ondřej, KRČMA Martin a KOTÁSEK Zdeněk. Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks. In: 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS). San José: IEEE Circuits and Systems Society, 2020, s. 1-4. ISBN 978-1-7281-3427-7.
    Detail

    LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin a KOTÁSEK Zdeněk. Hardening of Smart Electronic Lock Software against Random and Deliberate Faults. In: Proceedings - Euromicro Conference on Digital System Design, DSD 2020. Kranj: Institute of Electrical and Electronics Engineers, 2020, s. 680-683. ISBN 978-1-7281-9535-3.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin, BURGET Radek, HRUŠKA Tomáš a KOTÁSEK Zdeněk. Iterative Algorithm for Multidimensional Pareto Frontiers Intersection Determination. In: 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS). San José: IEEE Circuits and Systems Society, 2020, s. 1-4. ISBN 978-1-7281-3427-7.
    Detail

  • 2019

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin, BURGET Radek, HRUŠKA Tomáš a KOTÁSEK Zdeněk. Multidimensional Pareto Frontiers Intersection Determination and Processor Optimization Case Study. In: Proceedings of the 2019 22nd Euromicro Conference on Digital System Design. Kalithea: Institute of Electrical and Electronics Engineers, 2019, s. 597-600. ISBN 978-1-7281-2861-0.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin, BURGET Radek, HRUŠKA Tomáš a KOTÁSEK Zdeněk. Multidimensional Pareto Frontiers Intersection: Processor Optimization Case Study. In: Proceedings of the 7th Prague Embedded Systems Workshop. Roztoky u Prahy: České vysoké učení technické, 2019, s. 20-21. ISBN 978-80-01-06607-2.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, KRČMA Martin a KOTÁSEK Zdeněk. Smart Electronic Locks and Their Reliability. In: Proceedings of the 7th Prague Embedded Systems Workshop. Roztoky u Prahy: České vysoké učení technické, 2019, s. 4-5. ISBN 978-80-01-06607-2.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, KRČMA Martin a KOTÁSEK Zdeněk. Testing Reliability of Smart Electronic Locks: Analysis and the First Steps Towards. In: Proceedings of the 2019 22nd Euromicro Conference on Digital System Design. Kalithea: Institute of Electrical and Electronics Engineers, 2019, s. 506-513. ISBN 978-1-7281-2861-0.
    Detail

  • 2018

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin, BURGET Radek, HRUŠKA Tomáš a KOTÁSEK Zdeněk. A Processor Optimization Framework for a Selected Application. In: Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018, s. 564-574. ISBN 978-1-5386-5710-2.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub, ČEKAN Ondřej a KOTÁSEK Zdeněk. Evaluation Platform for Testing Fault Tolerance Properties: Soft-core Processor-based Experimental Robot Controller. In: Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018, s. 229-236. ISBN 978-1-5386-7376-8.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, PÁNEK Richard a KOTÁSEK Zdeněk. FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant Systems Design Automation. In: Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018, s. 244-251. ISBN 978-1-5386-7376-8.
    Detail

    ČEKAN Ondřej, PÁNEK Richard a KOTÁSEK Zdeněk. Input and Output Generation for the Verification of ALU: a Use Case. In: Proceedings of 2018 IEEE East-West Design and Test Symposium, EWDTS 2018. Kazan: IEEE Computer Society, 2018, s. 331-336. ISBN 978-1-5386-5710-2.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Program Generation Through a Probabilistic Constrained Grammar. In: Proceedings - 21st Euromicro Conference on Digital System Design, DSD 2018. Praha: IEEE Computer Society, 2018, s. 214-220. ISBN 978-1-5386-7376-8.
    Detail

    ČEKAN Ondřej a KOTÁSEK Zdeněk. Random Test Generation Through a Probabilistic Constrained Grammar. In: INFORMAL PROCEEDINGS 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Budapešť, 2018, s. 5-8.
    Detail

  • 2017

    ČEKAN Ondřej a KOTÁSEK Zdeněk. A Probabilistic Context-Free Grammar Based Random Test Program Generation. In: Proceedings of 20th Euromicro Conference on Digital System Design. Vídeň: Technische Universität Wien, 2017, s. 356-359. ISBN 978-1-5386-2145-5.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub, ZACHARIÁŠOVÁ Marcela, KRČMA Martin a KOTÁSEK Zdeněk. Functional Verification Based Platform for Evaluating Fault Tolerance Properties. Microprocessors and Microsystems, roč. 52, č. 5, 2017, s. 145-159. ISSN 0141-9331.
    Detail

    ČEKAN Ondřej a KOTÁSEK Zdeněk. Random Test Stimuli Generation Based on a Probabilistic Grammar. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Fakulta informačních technologií ČVUT, 2017, s. 43-44. ISBN 978-80-01-06178-7.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub, ČEKAN Ondřej, PÁNEK Richard a KOTÁSEK Zdeněk. Reliability Analysis and Improvement of FPGA-based Robot Controller. In: Proceedings of the 2017 20th Euromicro Conference on Digital System Design. Vídeň: IEEE Computer Society, 2017, s. 337-344. ISBN 978-1-5386-2145-5.
    Detail

  • 2016

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub a KOTÁSEK Zdeněk. Functional Verification as a Tool for Monitoring Impact of Faults in SRAM-based FPGAs. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, s. 293-294. ISBN 978-1-5090-5602-6.
    Detail

    ČEKAN Ondřej. Generování testovacích stimulů. In: Počítačové architektury a diagnostika PAD 2016. Bořetice - Kraví Hora: Fakulta informačních technologií VUT v Brně, 2016, s. 97-100. ISBN 978-80-214-5376-0.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Random Stimuli Generation Based on a Stochastic Context-Free Grammar. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, s. 295-296. ISBN 978-1-5090-5602-6.
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    ČEKAN Ondřej a KOTÁSEK Zdeněk. Software-implemented Fault-Tolerant Program Generation. Proceedings of the 4th Prague Embedded Systems Workshop. Roztoky u Prahy, 2016. ISBN 978-80-01-05984-5.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub a KOTÁSEK Zdeněk. Verification of Robot Controller for Evaluating Impacts of Faults in Electro-mechanical Systems. In: Proceedings of the 19th Euromicro Conference on Digital Systems Design. Limassol: IEEE Computer Society, 2016, s. 487-494. ISBN 978-1-5090-2816-0.
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  • 2015

    PODIVÍNSKÝ Jakub, ZACHARIÁŠOVÁ Marcela, ČEKAN Ondřej a KOTÁSEK Zdeněk. FPGA Prototyping and Accelerated Verification of ASIPs. In: IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015, s. 145-148. ISBN 978-1-4799-6780-3.
    Detail

    ČEKAN Ondřej. Principy generování verifikačních stimulů. In: Počítačové architektury a diagnostika PAD 2015. Zlín: Fakulta aplikované informatiky, Univerzita Tomáše Bati ve Zlíně, 2015, s. 13-18. ISBN 978-80-7454-522-1.
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    ČEKAN Ondřej, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Software Fault Tolerance: the Evaluation by Functional Verification. In: Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015, s. 284-287. ISBN 978-1-4673-8035-5.
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    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela a KOTÁSEK Zdeněk. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. Microprocessors and Microsystems, roč. 39, č. 8, 2015, s. 1215-1230. ISSN 0141-9331.
    Detail

    ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela a KOTÁSEK Zdeněk. Universal Pseudo-random Generation of Assembler Codes for Processors. In: Proceedings of The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015, s. 70-73.
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  • 2014

    ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela a KOTÁSEK Zdeněk. Solving of Constraint Satisfaction Problem. In: Proceedings of the 20th Conference STUDENT EEICT 2014. Volume 3. Brno: Fakulta informačních technologií VUT v Brně, 2014, s. 291-295. ISBN 978-80-214-4924-4.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela a KOTÁSEK Zdeněk. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. In: 17th Euromicro Conference on Digital Systems Design. Verona: IEEE Computer Society, 2014, s. 312-319. ISBN 978-1-4799-5793-4.
    Detail

    ČEKAN Ondřej. Universal Generation of Test Vectors for Functional Verification. In: Počítačové architektury a diagnostika 2014. Liberec: Technická univerzita v Liberci, 2014, s. 44-49. ISBN 978-80-7494-027-9.
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