Ing.

Lukáš Charvát

Ph.D.

Member


72532/BUT personal ID

Publications

  • 2022

    CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Utilizing parametric systems for detection of pipeline hazards. International Journal on Software Tools for Technology Transfer, vol. 2020, no. 1, 2022, pp. 1-28. ISSN 1433-2779.
    Detail

  • 2016

    CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Hades: Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems. In: Proceedings 11th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS 2016). Electronic Proceedings in Theoretical Computer Science, vol. 2016. Brno: Faculty of Informatics MU, 2016, pp. 87-93. ISBN 978-80-210-8362-2. ISSN 2075-2180.
    Detail

  • 2015

    CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems. In: Proceedings of the 15th International Conference on Computer Aided Systems Theory (EUROCAST 2015). Las Palmas de Grand Canaria: The Universidad de Las Palmas de Gran Canaria, 2015, pp. 193-194. ISBN 978-84-606-5438-4.
    Detail

    CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems. In: Computer Aided Systems Theory - EUROCAST 2015. Lecture Notes in Computer Science, vol. 9520. Zurich: Springer International Publishing, 2015, pp. 605-614. ISBN 978-3-319-27340-2. ISSN 0302-9743.
    Detail

  • 2014

    CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors. In: Proceedings of 15th International Workshop on Microprocessor Test and Verification (MTV 2014). Austin, TX: IEEE Computer Society, 2014, pp. 83-89. ISBN 978-1-4673-6858-2.
    Detail

    CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors. Brno: Faculty of Information Technology BUT, 2014.
    Detail

  • 2013

    CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. An Abstraction of Multi-Port Memories with Arbitrary Addressable Units. In: Proceedings of the 14th Computer Aided Systems Theory. Las Palmas de Grand Canaria: The Universidad de Las Palmas de Gran Canaria, 2013, pp. 254-255. ISBN 978-84-695-6971-9.
    Detail

    CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. An Abstraction of Multi-Port Memories with Arbitrary Addressable Units. In: Computer Aided Systems Theory - EUROCAST 2013. Lecture Notes in Computer Science, vol. 8111. Berlin Heidelberg: Springer Verlag, 2013, pp. 460-468. ISBN 978-3-642-53855-1.
    Detail

  • 2012

    CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Automatic Formal Correspondence Checking of ISA and RTL Microprocessor Description. In: Proceedings of the 13th International Workshop on Microprocessor Test and Verification (MTV 2012). Austin, TX: Institute of Electrical and Electronics Engineers, 2012, pp. 6-12. ISBN 978-1-4673-4441-8.
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