Ing. Petr Dvořáček

2016Relaxed equivalence checking for approximate computing, GACR, GA16-17538S, 2016-2018, running
Research leader: Vojnar Tomáš
2014Advanced Methods for Evolutionary Design of Complex Digital Circuits, GACR, GA14-04197S, 2014-2016, completed
Research leader: Sekanina Lukáš

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