Ing. Jan Kučera

Education:

  • 2016 - Ing. (MSc), Computer and Embedded Systems, FIT, Brno University of Technology, Czech Republic.
  • 2014 - Bc. (BSc), Information Technology, FIT, Brno University of Technology, Czech Republic.
  • 2011 - Gymnasium Uherské Hradiště, Czech Republic.

Professional career:

  • since 2012 - VHDL developer, CESNET z.s.p.o.

Research interests:

  • Hardware acceleration of algorithms using FPGA.
  • High-speed network security and monitoring.
  • Packet classification in high-speed networks.

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