Publication Details

Design of Power-Efficient Approximate Multipliers for Approximate Artificial Neural Networks

MRÁZEK Vojtěch, SARWAR Syed Shakib, SEKANINA Lukáš, VAŠÍČEK Zdeněk and ROY Kaushik. Design of Power-Efficient Approximate Multipliers for Approximate Artificial Neural Networks. In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. Austin, TX: Association for Computing Machinery, 2016, pp. 811-817. ISBN 978-1-4503-4466-1.
Czech title
Návrh nízkopříkonových aproximačních násobiček pro aproximační neuronové sítě
Type
conference paper
Language
english
Authors
Mrázek Vojtěch, Ing., Ph.D. (DCSY FIT BUT)
Sarwar Syed Shakib (PU)
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY FIT BUT)
Vašíček Zdeněk, doc. Ing., Ph.D. (DCSY FIT BUT)
Roy Kaushik (PU)
Keywords

Approximate computing, Neural networks, Logic synthesis, Low power, Genetic programming

Abstract


Artificial neural networks (NN) have shown a significant promise in difficult tasks like image classification or speech recognition. Even well-optimized hardware implementations of digital NNs show significant power consumption. It is mainly due to non-uniform pipeline structures and inherent redundancy of numerous arithmetic operations that have to be performed to produce each single output vector.  This paper provides a methodology for the design of well-optimized power-efficient NNs with a uniform structure suitable for hardware implementation. An error resilience analysis was performed in order to determine key constraints for the design of approximate multipliers that are employed in the resulting structure of NN. By means of a search based approximation method, approximate multipliers showing desired tradeoffs between the accuracy and implementation cost were created. Resulting approximate NNs, containing the approximate multipliers, were evaluated using standard benchmarks (MNIST dataset) and a real-world classification problem of Street-View House Numbers. Significant improvement in power efficiency was obtained in both cases with respect to regular NNs. In some cases, 91% power reduction of multiplication led to classification accuracy degradation of less than 2.80%. Moreover, the paper showed the capability of the back propagation learning algorithm to adapt with NNs containing the approximate multipliers. 

Published
2016
Pages
811-817
Proceedings
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design
Conference
2016 IEEE / ACM International Conference On Computer Aided Design, Austin, TX, US
ISBN
978-1-4503-4466-1
Publisher
Association for Computing Machinery
Place
Austin, TX, US
DOI
UT WoS
000390297800081
EID Scopus
BibTeX
@INPROCEEDINGS{FITPUB11142,
   author = "Vojt\v{e}ch Mr\'{a}zek and Shakib Syed Sarwar and Luk\'{a}\v{s} Sekanina and Zden\v{e}k Va\v{s}\'{i}\v{c}ek and Kaushik Roy",
   title = "Design of Power-Efficient Approximate Multipliers for Approximate Artificial Neural Networks",
   pages = "811--817",
   booktitle = "Proceedings of the IEEE/ACM International Conference on Computer-Aided Design",
   year = 2016,
   location = "Austin, TX, US",
   publisher = "Association for Computing Machinery",
   ISBN = "978-1-4503-4466-1",
   doi = "10.1145/2966986.2967021",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/11142"
}
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