Publication Details

Parallel Optimization of Transistor Level Circuits using Cartesian Genetic Programming

MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Parallel Optimization of Transistor Level Circuits using Cartesian Genetic Programming. In: GECCO Companion '17 Proceedings of the Companion Publication of the 2017 on Genetic and Evolutionary Computation Conference. Berlin: Association for Computing Machinery, 2017, pp. 1849-1856. ISBN 978-1-4503-4939-0.
Czech title
Paralelní optimalizace obvodů popsaných na úrovni tranzistorů pomocí kartézského genetického programování
Type
conference paper
Language
english
Authors
Keywords

Evolutionary optimization, transistor-level, parallel systems, digital circuits 

Abstract

The aim of the paper is to introduce a new parallel approach to evolutionary optimization of digital circuits described on transistor level. The evolutionary optimization is guided by the fitness function employing a simulator of candidate circuits. A new discrete simulator was introduced to achieve a good trade-off between precision and cost of circuit evaluations. The simulator is based on event-driven simulation. Precise numeric SPICE simulator is regularly called to validate simulation results. To increase the speed of evolution, three parallel approaches were proposed: (i) thread level parallelism, (ii) multiple computing nodes which collectively communicate and distribute the best solution, and (iii) client-server architecture eliminating a limited count of SPICE simulator instances.

Published
2017
Pages
1849-1856
Proceedings
GECCO Companion '17 Proceedings of the Companion Publication of the 2017 on Genetic and Evolutionary Computation Conference
Conference
Genetic and Evolutionary Computations Conference 2017, Berlin, DE
ISBN
978-1-4503-4939-0
Publisher
Association for Computing Machinery
Place
Berlin, DE
DOI
UT WoS
000625865500312
EID Scopus
BibTeX
@INPROCEEDINGS{FITPUB11377,
   author = "Vojt\v{e}ch Mr\'{a}zek and Zden\v{e}k Va\v{s}\'{i}\v{c}ek",
   title = "Parallel Optimization of Transistor Level Circuits using Cartesian Genetic Programming",
   pages = "1849--1856",
   booktitle = "GECCO Companion '17 Proceedings of the Companion Publication of the 2017 on Genetic and Evolutionary Computation Conference",
   year = 2017,
   location = "Berlin, DE",
   publisher = "Association for Computing Machinery",
   ISBN = "978-1-4503-4939-0",
   doi = "10.1145/3067695.3084212",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/11377"
}
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