Ing.

Jakub Podivínský

Ph.D.

Ph.D. student


L325 Office
120459/BUT personal ID

Publications

  • 2021

    LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej and KOTÁSEK Zdeněk. Accelerating Tests of Arithmetic Circuits Through On-FPGA Stimuli Generation and Their Reduction. In: International Conference on Electrical, Computer, Communications and Mechatronics Engineering, ICECCME 2021. Mauritius: Institute of Electrical and Electronics Engineers, 2021, pp. 1628-1633. ISBN 978-1-6654-1262-9.
    Detail

    PÁNEK Richard, LOJDA Jakub, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Reliability Analysis of the FPGA Control System with Reconfiguration Hardening. In: Proceedings - 2021 24th Euromicro Conference on Digital System Design, DSD 2021. Palermo: Institute of Electrical and Electronics Engineers, 2021, pp. 553-556. ISBN 978-1-6654-2703-6.
    Detail

    LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin and KOTÁSEK Zdeněk. Testing Embedded Software Through Fault Injection: Case Study on Smart Lock. In: 2021 IEEE 22nd Latin American Test Symposium, LATS 2021. Punta del Este: Institute of Electrical and Electronics Engineers, 2021, pp. 80-85. ISBN 978-1-6654-2057-0.
    Detail

  • 2020

    LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin and KOTÁSEK Zdeněk. Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock. In: 2020 IEEE East-West Design and Test Symposium, EWDTS 2020 - Proceedings. Varna: Institute of Electrical and Electronics Engineers, 2020, pp. 24-28. ISBN 978-1-7281-9899-6.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, PÁNEK Richard, KRČMA Martin and KOTÁSEK Zdeněk. Automatic Design of Reliable Systems Based on the Multiple-choice Knapsack Problem. In: Proceedings - 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2020. Novi Sad: Institute of Electrical and Electronics Engineers, 2020, pp. 1-4. ISBN 978-1-7281-9938-2.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, ČEKAN Ondřej, KRČMA Martin and KOTÁSEK Zdeněk. Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks. In: 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS). San José: IEEE Circuits and Systems Society, 2020, pp. 1-4. ISBN 978-1-7281-3427-7.
    Detail

    LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin and KOTÁSEK Zdeněk. Hardening of Smart Electronic Lock Software against Random and Deliberate Faults. In: Proceedings - Euromicro Conference on Digital System Design, DSD 2020. Kranj: Institute of Electrical and Electronics Engineers, 2020, pp. 680-683. ISBN 978-1-7281-9535-3.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin, BURGET Radek, HRUŠKA Tomáš and KOTÁSEK Zdeněk. Iterative Algorithm for Multidimensional Pareto Frontiers Intersection Determination. In: 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS). San José: IEEE Circuits and Systems Society, 2020, pp. 1-4. ISBN 978-1-7281-3427-7.
    Detail

    PÁNEK Richard, LOJDA Jakub, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Reliability Analysis of Reconfiguration Controller for FPGA-Based Fault Tolerant Systems: Case Study. In: 2020 International Symposium on VLSI Design, Automation, and Test (VLSI-DAT) : proceedings of technical papers. Hsinchu: IEEE Computer Society, 2020, pp. 121-124. ISBN 978-1-7281-6083-2.
    Detail

  • 2019

    PODIVÍNSKÝ Jakub, LOJDA Jakub and KOTÁSEK Zdeněk. Extended Reliability Analysis of Fault-Tolerant FPGA-based Robot Controller. In: 20th IEEE Latin American Test Symposium (LATS 2019). Santiago: IEEE Computer Society, 2019, pp. 97-100. ISBN 978-1-7281-1756-0.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin, BURGET Radek, HRUŠKA Tomáš and KOTÁSEK Zdeněk. Multidimensional Pareto Frontiers Intersection Determination and Processor Optimization Case Study. In: Proceedings of the 2019 22nd Euromicro Conference on Digital System Design. Kalithea: Institute of Electrical and Electronics Engineers, 2019, pp. 597-600. ISBN 978-1-7281-2861-0.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin, BURGET Radek, HRUŠKA Tomáš and KOTÁSEK Zdeněk. Multidimensional Pareto Frontiers Intersection: Processor Optimization Case Study. In: Proceedings of the 7th Prague Embedded Systems Workshop. Roztoky u Prahy: Czech Technical University, 2019, pp. 20-21. ISBN 978-80-01-06607-2.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Reliability Indicators for Automatic Design and Analysis of Fault-Tolerant FPGA Systems. In: 20th IEEE Latin American Test Symposium (LATS 2019). Santiago: IEEE Computer Society, 2019, pp. 93-96. ISBN 978-1-7281-1756-0.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, KRČMA Martin and KOTÁSEK Zdeněk. Smart Electronic Locks and Their Reliability. In: Proceedings of the 7th Prague Embedded Systems Workshop. Roztoky u Prahy: Czech Technical University, 2019, pp. 4-5. ISBN 978-80-01-06607-2.
    Detail

    PODIVÍNSKÝ Jakub. Souhrnná výzkumná zpráva k projektu KPB Intra - Nabíječka elektromobilů - 4. etapa. Brno: KPB INTRA s.r.o., 2019.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, KRČMA Martin and KOTÁSEK Zdeněk. Testing Reliability of Smart Electronic Locks: Analysis and the First Steps Towards. In: Proceedings of the 2019 22nd Euromicro Conference on Digital System Design. Kalithea: Institute of Electrical and Electronics Engineers, 2019, pp. 506-513. ISBN 978-1-7281-2861-0.
    Detail

  • 2018

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin, BURGET Radek, HRUŠKA Tomáš and KOTÁSEK Zdeněk. A Framework for Optimizing a Processor to Selected Application. In: Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018, pp. 564-574. ISBN 978-1-5386-5710-2.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub and KOTÁSEK Zdeněk. An Experimental Evaluation of Fault-Tolerant FPGA-based Robot Controller. In: Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018, pp. 63-69. ISBN 978-1-5386-5710-2.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub, ČEKAN Ondřej and KOTÁSEK Zdeněk. Evaluation Platform for Testing Fault Tolerance Properties: Soft-core Processor-based Experimental Robot Controller. In: Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018, pp. 229-236. ISBN 978-1-5386-7376-8.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Fault Tolerance Properties of Systems Generated with the Use of High-Level Synthesis. In: Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018, pp. 80-86. ISBN 978-1-5386-5710-2.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub and KOTÁSEK Zdeněk. FPGA-based Robot Controller: An Experimental Evaluation of Fault Tolerance Properties. In: INFORMAL PROCEEDINGS 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Budapešť, 2018, pp. 9-12.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, PÁNEK Richard and KOTÁSEK Zdeněk. FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant Systems Design Automation. In: Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018, pp. 244-251. ISBN 978-1-5386-7376-8.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, KOTÁSEK Zdeněk and KRČMA Martin. Majority Type and Redundancy Level Influences on Redundant Data Types Approach for HLS. In: 2018 16th Biennial Baltic Electronics Conference (BEC). Tallinn: IEEE Computer Society, 2018, pp. 1-4. ISBN 978-1-5386-7312-6.
    Detail

    PÁNEK Richard, LOJDA Jakub, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Partial Dynamic Reconfiguration in an FPGA-based Fault-Tolerant System: Simulation-based Evaluation. In: Proceedings of IEEE East-West Design & Test Symposium. Kazaň: IEEE Computer Society, 2018, pp. 129-134. ISBN 978-1-5386-5710-2.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Program Generation Through a Probabilistic Constrained Grammar. In: Proceedings - 21st Euromicro Conference on Digital System Design, DSD 2018. Praha: IEEE Computer Society, 2018, pp. 214-220. ISBN 978-1-5386-7376-8.
    Detail

    PODIVÍNSKÝ Jakub. Souhrnná výzkumná zpráva k projektu KPB Intra - Nabíječka elektromobilů - 2. etapa. Brno: KPB INTRA s.r.o., 2018.
    Detail

    PODIVÍNSKÝ Jakub. Souhrnná výzkumná zpráva k projektu KPB Intra - Nabíječka elektromobilů - 3. etapa. Brno: KPB INTRA s.r.o., 2018.
    Detail

    PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Testing Fault Tolerance Properties: Soft-core Processor-based Experimental Robot Controller. In: Proceedings of the 6th Prague Embedded Systems Workshop. Roztoky u Prahy: Czech Technical University, 2018, pp. 33-34. ISBN 978-80-01-06456-6.
    Detail

  • 2017

    LOJDA Jakub, PODIVÍNSKÝ Jakub, KOTÁSEK Zdeněk and KRČMA Martin. Data Types and Operations Modifications: a Practical Approach to Fault Tolerance in HLS. In: Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017, pp. 273-278. ISBN 978-1-5386-3299-4.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub, ZACHARIÁŠOVÁ Marcela, KRČMA Martin and KOTÁSEK Zdeněk. Functional Verification Based Platform for Evaluating Fault Tolerance Properties. Microprocessors and Microsystems, vol. 52, no. 5, 2017, pp. 145-159. ISSN 0141-9331.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Redundant Data Types and Operations in HLS and their Use for a Robot Controller Unit Fault Tolerance Evaluation. In: Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017, pp. 359-364. ISBN 978-1-5386-3299-4.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub, ČEKAN Ondřej, PÁNEK Richard and KOTÁSEK Zdeněk. Reliability Analysis and Improvement of FPGA-based Robot Controller. In: Proceedings of the 2017 20th Euromicro Conference on Digital System Design. Vídeň: IEEE Computer Society, 2017, pp. 337-344. ISBN 978-1-5386-2145-5.
    Detail

    PODIVÍNSKÝ Jakub. Souhrnná výzkumná zpráva k projektu KPB Intra - Uživatelské rozhraní nabíječky elektromobilů. Brno: KPB INTRA s.r.o., 2017.
    Detail

    PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. The Use of Functional Verification for Monitoring Impact of Faults in SRAM-based FPGAs. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2017, pp. 81-82. ISBN 978-80-01-06178-7.
    Detail

  • 2016

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub and KOTÁSEK Zdeněk. Functional Verification as a Tool for Monitoring Impact of Faults in SRAM-based FPGAs. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, pp. 293-294. ISBN 978-1-5090-5602-6.
    Detail

    PODIVÍNSKÝ Jakub. Funkční verifikace jako nástroj pro sledování vlivu poruch na elektro-mechanický systém. In: Počítačové architektury a diagnostika PAD 2016. Bořetice - Kraví Hora: Faculty of Information Technology BUT, 2016, pp. 101-104. ISBN 978-80-214-5376-0.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, KRČMA Martin and KOTÁSEK Zdeněk. HLS-based Fault Tolerance Approach for SRAM-based FPGAs. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, pp. 301-302. ISBN 978-1-5090-5602-6.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Random Stimuli Generation Based on a Stochastic Context-Free Grammar. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, pp. 295-296. ISBN 978-1-5090-5602-6.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub and KOTÁSEK Zdeněk. Verification of Robot Controller for Evaluating Impacts of Faults in Electro-mechanical Systems. In: Proceedings of the 19th Euromicro Conference on Digital Systems Design. Limassol: IEEE Computer Society, 2016, pp. 487-494. ISBN 978-1-5090-2816-0.
    Detail

    KOTÁSEK Zdeněk and PODIVÍNSKÝ Jakub. Verification of Robot Controller for Evaluating Impacts of Faults in Electro-mechanical Systems. Proceedings of the 4th Prague Embedded Systems Workshop. Roztoky u Prahy, 2016.
    Detail

  • 2015

    PODIVÍNSKÝ Jakub, ZACHARIÁŠOVÁ Marcela, ČEKAN Ondřej and KOTÁSEK Zdeněk. FPGA Prototyping and Accelerated Verification of ASIPs. In: IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015, pp. 145-148. ISBN 978-1-4799-6780-3.
    Detail

    PODIVÍNSKÝ Jakub, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. Radiation Impact on Mechanical Application Driven by FPGA-based Controller. In: Proceedings of The Fourth Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015, pp. 13-16.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Software Fault Tolerance: the Evaluation by Functional Verification. In: Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015, pp. 284-287. ISBN 978-1-4673-8035-5.
    Detail

    PODIVÍNSKÝ Jakub. Souhrnná výzkumná zpráva k projektu Vytvoření webové aplikace pro online vytváření a přehrávání časosběrných videí. Brno: CEDRO sole s.r.o., 2015.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. Microprocessors and Microsystems, vol. 39, no. 8, 2015, pp. 1215-1230. ISSN 0141-9331.
    Detail

    PODIVÍNSKÝ Jakub. Využití funkční verifikace pro ověřování metodik pro zajištění odolnosti proti poruchám. In: Počítačové architektury a diagnostika PAD 2015. Zlín: Tomas Bata University in Zlín, 2015, pp. 7-12. ISBN 978-80-7454-522-1.
    Detail

  • 2014

    PODIVÍNSKÝ Jakub, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. Complex Control System for Testing Fault-Tolerance Methodologies. In: Proceedings of The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Dresden: COST, European Cooperation in Science and Technology, 2014, pp. 24-27. ISBN 978-2-11-129175-1.
    Detail

    PODIVÍNSKÝ Jakub. Testing Fault-Tolerance Properties in FPGA based Electro-mechanical Applications. In: Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014, pp. 13-18. ISBN 978-80-7494-027-9.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, ZACHARIÁŠOVÁ Marcela and KOTÁSEK Zdeněk. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. In: 17th Euromicro Conference on Digital Systems Design. Verona: IEEE Computer Society, 2014, pp. 312-319. ISBN 978-1-4799-5793-4.
    Detail

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