Ing. Jan Kořenek, Ph.D.

2013Kaštil, J., Kořenek, J.: Hardware Architecture for the Fast Pattern Matching, In: DDECS 2013, Karlovy Vary, CZ, IEEE CS, 2013, s. 1-4
 Matoušek, J., Skačan, M., Kořenek, J.: Towards Hardware Architecture for Memory Efficient IPv4/IPv6 Lookup in 100 Gbps Networks, In: 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Brno, CZ, IEEE CS, 2013, s. 108-111, ISBN 978-1-4673-6133-0
2012Kekely, L., Puš, V., Kořenek, J.: Low-Latency Modular Packet Header Parser for FPGA, In: ACM/IEEE Symposium on Architectures for Networking and Communications Systems, Austin, US, ACM, 2012, s. 77-78, ISBN 978-1-4503-1685-9
 Kořenek, J., Korček, P., Košař, V., Žádník, M., Viktorin, J.: A New Embedded Platform for Rapid Development of Networking Applications, In: Proceedings of the 2012 Seventh ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2012), Austin, US, IEEE CS, 2012, s. 81-82, ISBN 978-1-4503-1684-2
 Puš, V., Kořenek, J.: Reducing memory in high-speed packet classification, In: Proceedings of the 8th International Wireless Communications and Mobile Computing Conference, Limassol, CY, FU, 2012, s. 437-442, ISBN 978-1-4577-1377-4
2011Kořenek, J., Korček, P., Kaštil, J.: Sondy pro monitorování provozu, FIT-TR-2011-09, Brno, CZ, FIT VUT, 2011, s. 26
 Košař, V., Kořenek, J.: Reduction of FPGA Resources for Regular Expression Matching by Relation Similarity, In: IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011, Cottbus, DE, IEEE CS, 2011, s. 401-402, ISBN 978-1-4244-9753-9
 Puš, V., Kajan, M., Kořenek, J.: Hardware Architecture for Packet Classification with Prefix Coloring, In: IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011, Cottbus, DE, IEEE CS, 2011, s. 231-236, ISBN 978-1-4244-9753-9
 Puš, V., Tobola, J., Kaštil, J., Košař, V., Kořenek, J.: Netbench - the Framework for Evaluation of Packet Processing Algorithms, In: Proceedings of the 7th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, New York, US, IEEE CS, 2011, s. 95-96, ISBN 978-0-7695-4521-9
 Tobola, J., Kořenek, J.: Effective Hash-based IPv6 Longest Prefix Match, In: IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011, Cottbus, DE, IEEE CS, 2011, s. 325-328, ISBN 978-1-4244-9753-9
2010Kajan, M., Kořenek, J.: Efficient Packet Classification Algorithm Based on Entropy, In: Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, La Jolla, US, ACM, 2010, s. 11-12, ISBN 978-1-4503-0379-8
 Kaštil, J., Kořenek, J.: Hardware Accelerated Pattern Matching Based on Deterministic Finite Automata with Perfect Hashing, In: Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems DDECS 2010, Vienna, AT, IEEE CS, 2010, s. 149-152, ISBN 978-1-4244-6610-8
 Kaštil, J., Kořenek, J.: High Speed Pattern Matching Algorithm Based on Deterministic Finite Automata with Faulty Transition Table, In: Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, La Jolla, US, ACM, 2010, s. 2, ISBN 978-1-4503-0379-8
 Kořenek, J., Košař, V.: Architektura NFA Split pro rychlé hledání regulárních výrazů, In: Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, La Jolla, US, ACM, 2010, s. 2, ISBN 978-1-4503-0379-8
 Kořenek, J., Košař, V.: Efficient Mapping of Nondeterministic Automata to FPGA for Fast Regular Expression Matching, In: Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems DDECS 2010, Vienna, AT, IEEE CS, 2010, s. 6, ISBN 978-1-4244-6610-8
 Kořenek, J., Puš, V.: Memory Optimization for Packet Classification Algorithms in FPGA, In: Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, Vídeň, AT, IEEE CS, 2010, s. 297-300, ISBN 978-1-4244-6610-8
 Kořenek, J.: Fast Regular Expression Matching Using FPGA, In: Information Sciences and Technologies Bulletin of the ACM Slovakia, roč. 2, č. 2, 2010, Bratislava, SK, s. 103-111, ISSN 1338-1237
 Kořenek, J.: Rychlé vyhledávání regulárních výrazů s využitím technologie FPGA, Brno, CZ, UPSY FIT VUT, 2010, s. 105
2009Kaštil, J., Kořenek, J., Lengál, O.: Methodology for Fast Pattern Matching by Deterministic Finite Automaton with Perfect Hashing, In: 12th EUROMICRO Conference on Digital System Design DSD 2009, Patras, GR, IEEE CS, 2009, s. 823-289, ISBN 978-0-7695-3782-5
 Kobierský, P., Kořenek, J., Polčák, L.: Packet Header Analysis and Field Extraction for Multigigabit Networks, In: Proceedings of the 2009 IEEE Symphosium on Design and Diagnostics of Electronic Circuits and Systems, Liberec, CZ, IEEE CS, 2009, s. 96-101, ISBN 978-1-4244-3339-1
 Kořenek, J., Puš, V.: Memory Optimization for Packet Classification Algorithms, In: Proceedings of the 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, New York, US, ACM, 2009, s. 165-166, ISBN 978-1-60558-630-4
 Puš, V., Kořenek, J.: Fast and scalable packet classification using perfect hash functions, In: Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays, New York, US, ACM, 2009, s. 229-236, ISBN 978-1-60558-410-2
2008Kaštil, J., Kořenek, J.: Deterministic Finite Automaton with Perfect Hashing for Fast Pattern Matching, In: Proceedings of Junior Scientist Conference 2008, Vienna, AT, TU-Wien, 2008, s. 103-104, ISBN 978-3-200-01612-5
 Kaštil, J., Kořenek, J.: Deterministický konečný automat pro vyhledání vzorů ve vysokorychlostních sítích, In: Proceedings of the 14th Conference STUDENT EEICT 2008, Brno, CZ, VUT v Brně, 2008, s. 227-229, ISBN 978-80-214-3615-2
 Málek, T., Martínek, T., Kořenek, J.: GICS: Generic Interconnection System, In: 2008 International Conference on Field Programmable Logic and Applications, Heidelberg, DE, IEEE CS, 2008, s. 263-268, ISBN 978-1-4244-1960-9
 Žádník, M., Kořenek, J., Lengál, O., Kobierský, P.: Network Probe for Flexible Flow Monitoring, In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, Bratislava, SK, IEEE CS, 2008, s. 213-218, ISBN 978-1-4244-2276-0
2007Kobierský, P., Kořenek, J., Hank, A.: Traffic Scanner, Příbram, CZ, CESNET, 2007, s. 55-67, ISBN 978-80-239-9285-4
 Kořenek, J., Kobierský, P.: Intrusion Detection System Intended for Multigigabit Networks, In: 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems, Krakow, PL, IEEE CS, 2007, s. 361-364, ISBN 978-1-4244-1161-0
 Košek, M., Kořenek, J.: FlowContext: Flexible Platform for Multigigabit Stateful Packet Processing, In: 2007 International Conference on Field Programmable Logic and Applications, Los Alamitos, US, IEEE CS, 2007, s. 804-807, ISBN 978-1-4244-1059-0
 Tobola, J., Kotásek, Z., Kořenek, J., Martínek, T., Straka, M.: Online Protocol Testing for FPGA Based Fault Tolerant Systems, In: 10th EUROMICRO Conference on Digital System Design DSD 2007, Lubeck, Germany, DE, IEEE CS, 2007, s. 676-679, ISBN 0-7695-2978-X
2006Černý, S., Stružka, P., Kořenek, J., Martínek, T., Kotásek, Z.: FPGA Components in Simulink, In: Proceedings of XXVIIIth International Autumn Colloquium ASIS 2006, Ostrava, CZ, MARQ, 2006, s. 158-163, ISBN 80-86840-26-3
 Martínek, T., Kořenek, J., Novotný, J.: Network Monitoring Adaptor for 10Gbps Technology using FPGA, In: CESNET Conference 2006 Proceedings, Prague : CESNET, z. s. p. o., CZ, CESNET, 2006, s. 143-151, ISBN 978-80-239-6533-9
 Martínek, T., Lexa, M., Kořenek, J., Fučík, O.: A flexible technique for the automatic design of approximate string matching architectures, In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, Praha, CZ, IEEE CS, 2006, s. 83-84, ISBN 1-4244-0184-4
2005Kořenek, J., Sekanina, L.: Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs, In: Evolvable Systems: From Biology to Hardware, Berlin, DE, Springer, 2005, s. 46-55, ISBN 978-3-540-28736-0
 Kořenek, J.: Rychlé vyhledávání regulárních výrazů s využitím FPGA, In: Sborník příspěvků ze semináře Počítačové Architektury a Diagnostika, Praha, CZ, FEL ČVUT, 2005, s. 6
 Martínek, T., Zemčík, P., Kořenek, J.: FPGA-Based Platform for Network Applications, In: Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop, Sopron, HU, UWH, 2005, s. 194-197, ISBN 963-9364-48-7
 Žádník, M., Pečenka, T., Kořenek, J.: NetFlow Probe Intended for High-Speed Networks, In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL05), Tampere, FI, IEEE CS, 2005, s. 695-698, ISBN 0-7803-9362-7

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