Ing. Jan Kořenek, Ph.D.
| Kobierský, P., Kořenek, J., Polčák, L.: Packet Header Analysis and Field Extraction for Multigigabit Networks, In: Proceedings of the 2009 IEEE Symphosium on Design and Diagnostics of Electronic Circuits and Systems, Liberec, CZ, IEEE CS, 2009, p. 96-101, ISBN 978-1-4244-3339-1 | | Publication language: | english |
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| Original title: | Packet Header Analysis and Field Extraction for Multigigabit Networks |
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| Title (cs): | Analýza hlaviček síťových protokolů a jejich extrakce pro multigigabitové sítě |
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| Pages: | 96-101 |
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| Proceedings: | Proceedings of the 2009 IEEE Symphosium on Design and Diagnostics of Electronic Circuits and Systems |
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| Conference: | IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems |
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| Place: | Liberec, CZ |
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| Year: | 2009 |
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| ISBN: | 978-1-4244-3339-1 |
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| Publisher: | IEEE Computer Society |
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| Keywords |
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protocol analysis, extraction, networks, XML, FPGA
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| Annotation |
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| Packet header analysis and extraction of header fields needs to be
performed in all network devices. As network speed is increasing
quickly, high speed packet header processing is required. We propose a
new architecture of packet header analysis and fields extraction
intended for high-speed FPGA-based network applications. The
architecture is able to process 20 Gbps network links with less than 12
percent of available resources of Virtex 5 110 FPGA. Moreover, the
presented solution can balance between network throughput and consumed
hardware resources to fit application needs. The architecture for
packet header processing is generated from standard XML protocol scheme
and is strongly optimised for resource consumption and speed by an
automatic HDL code generator. Our solution also enables to change the
set of extracted header fields on-line without FPGA reconfiguration. |
| BibTeX: |
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@INPROCEEDINGS{
author = {Petr Kobierský and Jan Kořenek and Libor Polčák},
title = {Packet Header Analysis and Field Extraction for Multigigabit
Networks},
pages = {96--101},
booktitle = {Proceedings of the 2009 IEEE Symphosium on Design and
Diagnostics of Electronic Circuits and Systems},
year = {2009},
location = {Liberec, CZ},
publisher = {IEEE Computer Society},
ISBN = {978-1-4244-3339-1},
language = {english},
url = {http://www.fit.vutbr.cz/research/view_pub.php?id=8927}
} |
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