Doc. Ing. Jan Kořenek, Ph.D.

ČERNÝ Stanislav, STRUŽKA Petr, KOŘENEK Jan, MARTÍNEK Tomáš and KOTÁSEK Zdeněk. FPGA Components in Simulink. In: Proceedings of XXVIIIth International Autumn Colloquium ASIS 2006. Ostrava, 2006, pp. 158-163. ISBN 80-86840-26-3.
Publication language:english
Original title:FPGA Components in Simulink
Title (cs):FPGA komponenty v prostředí Simulinku
Proceedings:Proceedings of XXVIIIth International Autumn Colloquium ASIS 2006
Conference:28th International Autumn Colloquium Advanced Simulation of Systems - ASIS 2006
Place:Ostrava, CZ

VHDL, FPGA, code generation, Simulink, modeling, Processor Expert


The paper gives a brief view on possibilities how to exploit modeling features of Simulink interconnected with Processor Expert to finalize code of VHDL components placed in FPGA. Such an FPGA can be used to deliver powerful co-processing unit where main processing unit (e.g. microcontroller) is not powerful enough and/or the task to be solved is somehow special.

   author = {Stanislav {\v{C}}ern{\'{y}} and Petr Stru{\v{z}}ka
	and Jan Ko{\v{r}}enek and Tom{\'{a}}{\v{s}}
	Mart{\'{i}}nek and Zden{\v{e}}k Kot{\'{a}}sek},
   title = {FPGA Components in Simulink},
   pages = {158--163},
   booktitle = {Proceedings of XXVIIIth International Autumn Colloquium ASIS
   year = 2006,
   location = {Ostrava, CZ},
   ISBN = {80-86840-26-3},
   language = {english},
   url = {}

Your IPv4 address:
Switch to https