Cartesian Genetic Programming and its Applications
Tutorial at IEEE Congress on Evolutionary Computation 2021
Speakers
- Prof. Lukas Sekanina, Faculty of Information Technology, Brno University of Technology, Czech Rep.
- Dr. Julian F. Miller, Honorary Fellow in Department of Computer Science at the University of York, UK
Abstract
The goal of this tutorial is to acquaint the CEC community with the principles and state-of-the-art results of Cartesian Genetic Programming (CGP). We will also present real world applications of CGP that have recently emerged in the areas of image processing, approximate computing, automated circuit design, and neural network evolution. As these applications are often presented outside the evolutionary computation community, this tutorial aims to introduce these developments to a wider CEC audience. The tutorial should also lead to better understanding of advantages and disadvantages of CGP in the entire portfolio of evolutionary algorithms.
Outline
Part 1 (50 min): Principles of CGP by Julian Miller
- Introduction to GP, motivation for CGP
- CGP - principles, representation, decoding, search operators, search algorithm, neutrality
- Advanced CGP - modular, self-modifying, recurrent
- Neuroevolution with CGP
- Open source SW for CGP
Part 2 (50 min): Applications of CGP by Lukas Sekanina
- Evolutionary design of complex circuits (thousands of gates, hundreds of primary inputs)
- Approximate circuit design
- Image processing
- CGP in Deep neural network design
Part 3 (15 min): Questions and Discussion
References
- www.cartesiangp.com
- Miller J.F.: Cartesian genetic programming: its status and future. Genetic Programming and Evolvable Machines, Vol. 21, 2020, pp. 29-168
- Miller J.F. (ed.): Cartesian Genetic Programming, Springer Verlag, 2011
- Trefzer M., Tyrrell A.M.: Evolvable Hardware - From Practice to Application. Springer Verlag, 2015
- Sekanina L., Vasicek Z., Mrazek V.: Automated Search-Based Functional Approximation for Digital Circuits. Approximate Circuits - Methodologies and CAD (edited by M. Shafique and S. Reda). Heidelberg: Springer International Publishing, 2019, pp. 175-203
- Vasicek Z., Sekanina L.: Evolutionary Approach to Approximate Digital Circuits Design. IEEE Transactions on Evolutionary Computation. Vol. 19, No. 3, 2015, pp. 432-444
About the speakers
Prof. Lukas Sekanina received all his degrees from Brno University of Technology, Czech Republic (Ing. in 1999, Ph.D. in 2002), where he is currently a full professor and Head of the Department of Computer Systems. He was awarded with the Fulbright scholarship and worked on the evolutionary circuit design with NASA Jet Propulsion Laboratory in Pasadena in 2004. He was a visiting lecturer with Pennsylvania State University (2001), Universidad Politécnica de Madrid (2012), and a visiting researcher with University of Oslo in 2001. Awards: Gold (2015), Silver (2011, 2008) and Bronze (2018) medals from Human-competitive awards in genetic and evolutionary computation at GECCO; Siemens Award for outstanding PhD thesis in 2003; Siemens Award for outstanding research monograph in 2005; Best paper/poster awards (e.g. DATE 2017, NASA/ESA AHS 2013, EvoHOT 2005, DDECS 2002); keynote conference speaker (e.g. IEEE SSCI-ICES 2015, DCIS 2014, ARCS 2013, UC 2009). He has served as a program committee member of many conferences (e.g. DATE, FPL, ReConFig, DDECS, GECCO, IEEE CEC, ICES, AHS, EuroGP), Associate Editor of IEEE Transactions on Evolutionary Computation (2011-2014) and Editorial board member of Genetic Programming and Evolvable Machines Journal and International Journal of Innovative Computing and Applications. He served as General Chair of the 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2013), Program Co-Chair of DDECS 2021, EuroGP 2018 - 2019, DTIS 2016, ICES 2008, and Topic chair of DATE 2020 and 2021 (D10 - Approximate computing). Prof. Sekanina is the author of Evolvable Components (a monograph published by Springer Verlag in 2004). He co-authored over 190 papers mainly on evolvable hardware, approximate circuits and bio-inspired computing. He is a Senior Member of IEEE.
Dr. Julian Miller received his BSc in Physics at the University of London in 1980. He obtained his PhD on nonlinear wave interaction in 1988 at the City University, UK. He is currently Honorary Fellow in Department of Computer Science at the University of York, UK. His main research interests are genetic programming (GP), and computational development. He is a highly cited and well-known researcher with over 12000 citations and an h-index of 42. He has published over 240 refereed papers on evolutionary computation, genetic programming, evolvable hardware, computational development and other topics. He has been chair or co-chair of eighteen conferences or workshops in genetic programming, computational development, evolvable hardware and evolutionary techniques. Dr. Miller chaired of the Evolvable Hardware tracks at the Genetic and Evolutionary Computation Conference in 2002-2003 and was Genetic Programming track chair in 2008. He was co-chair the Generative and Developmental Systems (GDS) track in 2007, 2009 and 2010. He is an associate editor of the Genetic Programming and Evolvable Machines and a former associate editor of IEEE Transactions on Evolutionary Computation. He is an editorial board member of the journals Evolutionary Computation and Unconventional Computing. He received the Evostar award in 2011 for outstanding contribution in evolutionary computation.
Last update: March 25, 2021