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Doc. Ing. Lukáš Sekanina, Ph.D.

Publications

2010Sekanina Lukáš: Evoluční návrh elektronických obvodů, In: Automa, Vol. 2010, No. 1, CZ, p. 48-51, ISSN 1210-9592
 Vašíček Zdeněk, Sekanina Lukáš, Bidlo Michal: A Method for Design of Impulse Bursts Noise Filters Optimized for FPGA Implementations, In: DATE 2010: Design, Automation and Test in Europe, Dresden, DE, EDAA, 2010, p. 1731-1736, ISBN 978-3-9810801-6-2
2009Gajda Zbyšek, Sekanina Lukáš: Gate-Level Optimization of Polymorphic Circuits Using Cartesian Genetic Programming, In: Proc. of 2009 IEEE Congress on Evolutionary Computation, NA, US, IEEE CIS, 2009, p. 1599-1604, ISBN 978-1-4244-2958-5
 Negoita Mircea, Sekanina Lukáš, Stoica Adrian: Adaptive and evolvable hardware and systems: the state of the art and the prospectus for future development, In: Journal of Automation, Mobile Robotics and Intelligent Systems, Vol. 3, No. 2, 2009, PL, p. 70-75, ISSN 1897-8649
 Sekanina Lukáš, Růžička Richard, Gajda Zbyšek: Polymorphic FIR Filters with Backup Mode Enabling Power Savings, In: Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems, Los Alamitos, US, IEEE CS, 2009, p. 43-50, ISBN 978-0-7695-3714-6
 Sekanina Lukáš, Růžička Richard, Vašíček Zdeněk, Prokop Roman, Fujcik Lukáš: REPOMO32 - New Reconfigurable Polymorphic Integrated Circuit for Adaptive Hardware, In: Proc. of the 2009 IEEE Symposium Series on Computational Intelligence - Workshop on Evolvable and Adaptive Hardware, Nashville, US, IEEE CIS, 2009, p. 39-46, ISBN 978-1-4244-2755-0
 Sekanina Lukáš, Vašíček Zdeněk, Růžička Richard, Bidlo Michal, Jaroš Jiří, Švenda Petr: Evoluční hardware: Od automatického generování patentovatelných invencí k sebemodifikujícím se strojům, Praha, CZ, Academia, 2009, p. 328, ISBN 978-80-200-1729-1
 Sekanina Lukáš: Evolvable Hardware: From Applications to Implications for the Theory of Computation, In: Proc. of the 8th Int. Conference on Unconventional Computation, Berlin, DE, Springer, 2009, p. 24-36, ISBN 978-3-642-03744-3
 Švenda Petr, Sekanina Lukáš, Matyáš Václav: Evolutionary Design of Secrecy Amplification Protocols for Wireless Sensor Networks, In: Proc. of the ACM Conference on Wireless Network Security, New York, US, ACM, 2009, p. 225-236, ISBN 978-1-60558-460-7
 Vašíček Zdeněk, Bidlo Michal, Sekanina Lukáš, Torresen Jim, Glette Kyrre, Furuholmen Marcus: Evolution of Impulse Bursts Noise Filters, In: Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems, Los Alamitos, US, IEEE CS, 2009, p. 27-34, ISBN 978-0-7695-3714-6
 Vašíček Zdeněk, Sekanina Lukáš: Efficient Hardware Accelerator for Symbolic Regression Problems, In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Znojmo, CZ, MUNI, 2009, p. 192-199, ISBN 978-80-87342-04-6
 Žaloudek Luděk, Sekanina Lukáš, Šimek Václav: GPU Accelerators for Evolvable Cellular Automata, In: Computation World: Future Computing, Service Computation, Adaptive, Content, Cognitive, Patterns, Athens, GR, IEEE, 2009, p. 533-537, ISBN 978-0-7695-3862-4
2008Hornby Gregory S., Sekanina Lukáš, Haddow Pauline C. (editors): Proceedings of Evolvable Systems: From Biology to Hardware, Berlin, DE, Springer, 2008, p. 444, ISBN 978-3-540-85856-0
 Negoita Mircea, Sekanina Lukáš, Stoica Adrian: Adaptive and Evolvable Hardware and Systems: The State of the Art and the Prospectus for Future Development, In: Lecture Notes in Computer Science, Vol. 2008, No. 5179, DE, p. 310-318, ISSN 0302-9743
 Pečenka Tomáš, Sekanina Lukáš, Kotásek Zdeněk: Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability, In: ACM Transactions on Design Automation of Electronic Systems, Vol. 13, No. 3, 2008, US, p. 1-21, ISSN 1084-4309
 Růžička Richard, Sekanina Lukáš, Prokop Roman: Physical Demonstration of Polymorphic Self-checking Circuits, In: Proc. of the 14th IEEE Int. On-Line Testing Symposium, Los Alamitos, US, IEEE CS, 2008, p. 31-36, ISBN 978-0-7695-3264-6
 Sekanina Lukáš, Mikušek Petr: Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures, In: Lecture Notes in Computer Science, Vol. 2008, No. 4974, DE, p. 144-153, ISSN 0302-9743
 Sekanina Lukáš, Stareček Lukáš, Kotásek Zdeněk, Gajda Zbyšek: Polymorphic Gates in Design and Test of Digital Circuits, In: International Journal of Unconventional Computing, Vol. 4, No. 2, 2008, Philadelphia, US, p. 125-142, ISSN 1548-7199
 Stareček Lukáš, Sekanina Lukáš, Kotásek Zdeněk: Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration, In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, Bratislava, SK, IEEE CS, 2008, p. 255-258, ISBN 978-1-4244-2276-0
 Vašíček Zdeněk, Čapka Ladislav, Sekanina Lukáš: Analysis of Reconfiguration Options for a Reconfigurable Polymorphic Circuit, In: Proc. of the 2008 NASA/ESA Conference on Adaptive Hardware and Systems, Los Alamitos, US, IEEE CS, 2008, p. 3-10, ISBN 978-0-7695-3166-3
 Vašíček Zdeněk, Sekanina Lukáš: Hardware Accelerators for Cartesian Genetic Programming, In: Lecture Notes in Computer Science, Vol. 2008, No. 4971, DE, p. 230-241, ISSN 0302-9743
 Vašíček Zdeněk, Sekanina Lukáš: Novel Hardware Implementation of Adaptive Median Filters, In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, Bratislava, SK, IEEE CS, 2008, p. 110-115, ISBN 978-1-4244-2276-0
 Vašíček Zdeněk, Žádník Martin, Sekanina Lukáš, Tobola Jiří: On Evolutionary Synthesis of Linear Transforms, In: Lecture Notes in Computer Science, Vol. 2008, No. 5216, DE, p. 141-152, ISSN 0302-9743
 Žaloudek Luděk, Sekanina Lukáš: Transistor-level Evolution of Digital Circuits Using a Special Circuit Simulator, In: Lecture Notes in Computer Science, Vol. 2008, No. 5216, DE, p. 320-331, ISSN 0302-9743
2007Gajda Zbyšek, Sekanina Lukáš: Reducing the Number of Transistors in Digital Circuits Using Gate-Level Evolutionary Design, In: 2007 Genetic and Evolutionary Computation Conference, New York, US, ACM, 2007, p. 245-252, ISBN 9781595936974
 Sekanina Lukáš, Martínek Tomáš: Evolving Image Operators Directly in Hardware, Genetic and Evolutionary Computation for Image Processing and Analysis, New York, US, Hindawi, 2007, p. 93-112, ISBN 978-977-454-001-1
 Sekanina Lukáš: Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates, In: 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Gliwice, PL, IEEE CS, 2007, p. 243-246, ISBN 1424411610
 Sekanina Lukáš: Evolution of Polymorphic Self-Checking Circuits, In: Lecture Notes in Computer Science, Vol. 2007, No. 4684, DE, p. 186-197, ISSN 0302-9743
 Sekanina Lukáš: Evolutionary Functional Recovery in Virtual Reconfigurable Circuits, In: ACM Journal on Emerging Technologies in Computing Systems, Vol. 3, No. 2, 2007, US, p. 1-22, ISSN 1550-4832
 Sekanina Lukáš: Evolvable hardware: Tutorial, In: 2007 Genetic and Evolutionary Computational Conference, New York, US, ACM, 2007, p. 3627-3644, ISBN 9781595936981
 Sekanina Lukáš: Evolved Computing Devices and the Implementation Problem, In: Minds and Machines, Vol. 17, No. 3, 2007, NL, p. 311-329, ISSN 0924-6495
 Sekanina Lukáš: Vztah mezi abstraktním a fyzickým výpočtem v kontextu evolučního návrhu, In: Kognice a umělý život VII, Opava, CZ, SLU, 2007, p. 305-310, ISBN 9788072484126
 Slaný Karel, Sekanina Lukáš: Fitness Landscape Analysis and Image Filter Evolution Using Functional-Level CGP, In: Lecture Notes in Computer Science, Vol. 2007, No. 4445, DE, p. 311-320, ISSN 0302-9743
 Stareček Lukáš, Sekanina Lukáš, Gajda Zbyšek, Kotásek Zdeněk, Prokop Roman, Musil Vladislav: On Properties and Utilization of Some Polymorphic Gates, In: 6th Electronic Circuits and Systems Conference (ECS 2007), Bratislava, SK, FIIT STU, 2007, p. 77-81, ISBN 978-80-227-2697-9
 Vašíček Zdeněk, Sekanina Lukáš: An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs, In: Proc. of 2007 International Conference on Field Programmable Logic and Applications, Los Alamitos, US, IEEE CS, 2007, p. 216-221, ISBN 1424410606
 Vašíček Zdeněk, Sekanina Lukáš: An Evolvable Hardware System in Xilinx Virtex II Pro FPGA, In: International Journal of Innovative Computing and Applications , Vol. 1, No. 1, 2007, Geneva, CH, p. 63-73, ISSN 1751-648X
 Vašíček Zdeněk, Sekanina Lukáš: Evaluation of a New Platform For Image Filter Evolution, In: Proc. of the 2007 NASA/ESA Conference on Adaptive Hardware and Systems, Los Alamitos, US, IEEE CS, 2007, p. 577-584, ISBN 076952866X
 Vašíček Zdeněk, Sekanina Lukáš: Reducing the Area on a Chip Using a Bank of Evolved Filters, In: Lecture Notes in Computer Science, Vol. 2007, No. 4684, DE, p. 222-232, ISSN 0302-9743

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