Prof. Ing. Lukáš Sekanina, Ph.D.

2017DOBAI Roland, KOŘENEK Jan a SEKANINA Lukáš. Evolutionary design of hash function pairs for network filters. Applied Soft Computing. Amsterdam: Elsevier Science, 2017, roč. 56, č. 7, s. 173-181. ISSN 1568-4946.
 GROCHOL David a SEKANINA Lukáš. Comparison of Parallel Linear Genetic Programming Implementations. In: Recent Advances in Soft Computing: Proceedings of the 22nd International Conference on Soft Computing (MENDEL 2016) held in Brno, Czech Republic, at June 8-10, 2016. Cham: Springer International Publishing, 2017, s. 64-76. ISBN 978-3-319-58088-3.
 GROCHOL David a SEKANINA Lukáš. Multiobjective Evolution of Hash Functions for High Speed Networks. In: Proceedings of the 2017 IEEE Congress on Evolutionary Computation. San Sebastian: IEEE Computer Society, 2017, s. 1533-1540. ISBN 978-1-5090-4600-3.
 KEŠNER Filip, SEKANINA Lukáš a BRÁZDIL Milan. Modular Framework for Detection of Inter-ictal Spikes in iEEG. In: The 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC'17). Los Alamos: Institute of Electrical and Electronics Engineers, 2017, s. 418-421. ISBN 978-1-5090-2809-2.
 MCDERMOTT James, CASTELLI Mauro, SEKANINA Lukáš, HAASDIJK Evert a GARCÍA-SÁNCHEZ Pablo, ed. 20th European Conference on Genetic Programming. Berlin: Springer International Publishing, 2017. ISBN 978-3-319-55696-3.
 MINAŘÍK Miloš a SEKANINA Lukáš. On Evolutionary Approximation of Sigmoid Function for HW/SW Embedded Systems. In: 20th European Conference on Genetic Programming, EuroGP 2017. Berlin: Springer International Publishing, 2017, s. 343-358. ISBN 978-3-319-55696-3.
 MRÁZEK Vojtěch, HRBÁČEK Radek, VAŠÍČEK Zdeněk a SEKANINA Lukáš. EvoApprox8b: Library of Approximate Adders and Multipliers for Circuit Design and Benchmarking of Approximation Methods. In: Proc. of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lausanne: European Design and Automation Association, 2017, s. 258-261. ISBN 978-3-9815370-9-3.
 SEKANINA Lukáš, VAŠÍČEK Zdeněk a MRÁZEK Vojtěch. Approximate Circuits in Low-Power Image and Video Processing: The Approximate Median Filter. Radioengineering. 2017, roč. 26, č. 3, s. 623-632. ISSN 1210-2512.
 SHAFIQUE Muhammad, HAFIZ Rehan, JAVED Muhammad Usama, ABBAS Sarmad, SEKANINA Lukáš, VAŠÍČEK Zdeněk a MRÁZEK Vojtěch. Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap. In: 2017 IEEE Computer Society Annual Symposium on VLSI. Los Alamitos: IEEE Computer Society Press, 2017, s. 627-632. ISBN 978-1-5090-6762-6.
 VAŠÍČEK Zdeněk, MRÁZEK Vojtěch a SEKANINA Lukáš. Towards Low Power Approximate DCT Architecture for HEVC Standard. In: Proc. of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lausanne: European Design and Automation Association, 2017, s. 1576-1581. ISBN 978-3-9815370-9-3.
 WIGLASZ Michal a SEKANINA Lukáš. Evolutionary Approximation of Gradient Orientation Module in HOG-based Human Detection System. In: 2017 IEEE Global Conference on Signal and Information Processing GlobalSIP 2017. Montreal: IEEE Signal Processing Society, 2017, s. 1300-1304. ISBN 978-1-5090-5989-8.
 ČEŠKA Milan, MATYÁŠ Jiří, MRÁZEK Vojtěch, SEKANINA Lukáš, VAŠÍČEK Zdeněk a VOJNAR Tomáš. Approximating Complex Arithmetic Circuits with Formal Error Guarantees: 32-bit Multipliers Accomplished. In: Proceedings of 36th IEEE/ACM International Conference On Computer Aided Design (ICCAD). Irvine, CA: Institute of Electrical and Electronics Engineers, 2017, s. 416-423. ISBN 978-1-5386-3093-8.
2016DOBAI Roland, KOŘENEK Jan a SEKANINA Lukáš. Adaptive Development of Hash Functions in FPGA-Based Network Routers. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: IEEE Computational Intelligence Society, 2016, s. 1-8. ISBN 978-1-5090-4240-1.
 DVOŘÁČEK Petr a SEKANINA Lukáš. Evolutionary Approximation of Edge Detection Circuits. In: 19th European Conference on Genetic programming. Berlin: Springer International Publishing, 2016, s. 19-34. ISBN 978-3-319-30667-4.
 GROCHOL David a SEKANINA Lukáš. Evolutionary design of fast high-quality hash functions for network applications. In: GECCO '16 Proceedings of the 2016 on Genetic and Evolutionary Computation Conference. New York, NY: Association for Computing Machinery, 2016, s. 901-908. ISBN 978-1-4503-4206-3.
 GROCHOL David, SEKANINA Lukáš, KOŘENEK Jan, ŽÁDNÍK Martin a KOŠAŘ Vlastimil. Evolutionary Circuit Design for Fast FPGA-Based Classification of Network Application Protocols. Applied Soft Computing. Amsterdam: Elsevier Science, 2016, roč. 38, č. 1, s. 933-941. ISSN 1568-4946.
 HOLÍK Lukáš, LENGÁL Ondřej, ROGALEWICZ Adam, SEKANINA Lukáš, VAŠÍČEK Zdeněk a VOJNAR Tomáš. Towards Formal Relaxed Equivalence Checking in Approximate Computing Methodology. In: 2nd Workshop on Approximate Computing (WAPCO 2016). Prague, 2016, s. 1-6.
 MRÁZEK Vojtěch, SARWAR Syed Shakib, SEKANINA Lukáš, VAŠÍČEK Zdeněk a ROY Kaushik. Design of Power-Efficient Approximate Multipliers for Approximate Artificial Neural Networks. In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. Austin, TX: Association for Computing Machinery, 2016, s. 811-817. ISBN 978-1-4503-4466-1.
 SEKANINA Lukáš a KAPUSTA Vlastimil. Visualisation and Analysis of Genetic Records Produced by Cartesian Genetic Programming. In: GECCO'16 Companion. New York: Association for Computing Machinery, 2016, s. 1411-1418. ISBN 978-1-4503-4323-7.
 SEKANINA Lukáš a VAŠÍČEK Zdeněk. Genetic Improvement for Approximate Computing. In: 2nd Workshop on Approximate Computing (WAPCO 2016). Prague, 2016, s. 1-2.
 SEKANINA Lukáš. Introduction to Approximate Computing: Embedded Tutorial. In: 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Košice: Institute of Electrical and Electronics Engineers, 2016, s. 90-95. ISBN 978-1-5090-2467-4.
 SÁNCHEZ-CLEMENTE Antonio José, ENTRENA Luis, HRBÁČEK Radek a SEKANINA Lukáš. Error Mitigation using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches. IEEE Transactions on Reliability. 2016, roč. 65, č. 4, s. 1871-1883. ISSN 0018-9529.
 VAVERKA Filip, HRBÁČEK Radek a SEKANINA Lukáš. Evolving Component Library for Approximate High Level Synthesis. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: IEEE Computational Intelligence Society, 2016, s. 1-8. ISBN 978-1-5090-4240-1.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Evolutionary Design of Complex Approximate Combinational Circuits. Genetic Programming and Evolvable Machines. Berlin: Springer Verlag, 2016, roč. 17, č. 2, s. 169-192. ISSN 1389-2576.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Search-based synthesis of approximate circuits implemented into FPGAs. In: 26th International Conference on Field Programmable Logic and Applications. Lausanne: Institute of Electrical and Electronics Engineers, 2016, s. 1-4. ISBN 978-2-8399-1844-2.
 VAŠÍČEK Zdeněk, MRÁZEK Vojtěch a SEKANINA Lukáš. Evolutionary Functional Approximation of Circuits Implemented into FPGAs. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: Institute of Electrical and Electronics Engineers, 2016, s. 1-8. ISBN 978-1-5090-4240-1.
2015DOBAI Roland a SEKANINA Lukáš. Low-Level Flexible Architecture with Hybrid Reconfiguration for Evolvable Hardware. ACM Transactions on Reconfigurable Technology and Systems. New York: Association for Computing Machinery, 2015, roč. 8, č. 3, s. 1-24. ISSN 1936-7406.
 DRAHOŠOVÁ Michaela, HULVA Jiří a SEKANINA Lukáš. Indirectly Encoded Fitness Predictors Coevolved with Cartesian Programs. In: Genetic Programming. Berlin: Springer International Publishing, 2015, s. 113-125. ISBN 978-3-319-16500-4.
 GROCHOL David, SEKANINA Lukáš, ŽÁDNÍK Martin a KOŘENEK Jan. A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP. In: Applications of Evolutionary Computation, 18th European Conference. Berlin: Springer International Publishing, 2015, s. 67-78. ISBN 978-3-319-16548-6.
 KEŠNER Filip, CIMBÁLNÍK Jan, DOLEŽALOVÁ Irena, BRÁZDIL Milan a SEKANINA Lukáš. Fast Automated Interictal Spike Detection in iEEG/ECoG Recordings. In: Proceedings of NEUROTECHNIX: International Congress on Neurotechnology, Electronics and Informatics. Lisabon, 2015, s. 1-4.
 MRÁZEK Vojtěch, VAŠÍČEK Zdeněk a SEKANINA Lukáš. Evolutionary Approximation of Software for Embedded Systems: Median Function. In: GECCO Companion '15 Proceedings of the Companion Publication of the 2015 on Genetic and Evolutionary Computation Conference. New York: Association for Computing Machinery, 2015, s. 795-801. ISBN 978-1-4503-3488-4.
 PETRLÍK Jiří a SEKANINA Lukáš. Towards Robust and Accurate Traffic Prediction Using Parallel Multiobjective Genetic Algorithms and Support Vector Regression. In: 2015 IEEE 18th International Conference on Intelligent Transportation Systems. Los Alamitos: IEEE Computer Society, 2015, s. 2231-2236. ISBN 978-1-4673-6596-3.
 SEKANINA Lukáš a VAŠÍČEK Zdeněk. Evolutionary Computing in Approximate Circuit Design and Optimization. In: 1st Workshop on Approximate Computing (WAPCO 2015). Amsterdam, 2015, s. 1-6.
 SEKANINA Lukáš a VAŠÍČEK Zdeněk. Functional Equivalence Checking for Evolution of Complex Digital Circuits. Evolvable Hardware - From Practice to Application. Berlin: Springer Verlag, 2015, s. 175-189. ISBN 978-3-662-44615-7.
 SEKANINA Lukáš. Principles and Applications of Polymorphic Circuits. Evolvable Hardware - From Practice to Application. Berlin: Springer Verlag, 2015, s. 209-224. ISBN 978-3-662-44615-7.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Circuit Approximation Using Single- and Multi-Objective Cartesian GP. In: Genetic Programming. Berlin: Springer International Publishing, 2015, s. 217-229. ISBN 978-3-319-16500-4.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Evolutionary Approach to Approximate Digital Circuits Design. IEEE Transactions on Evolutionary Computation. 2015, roč. 19, č. 3, s. 432-444. ISSN 1089-778X.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Evolutionary approximation of complex digital circuits. In: Proceedings of the Companion Publication of the 2015 on Genetic and Evolutionary Computation Conference. New York: Association for Computing Machinery, 2015, s. 1505-1506. ISBN 978-1-4503-3488-4.
2014DOBAI Roland, GLETTE Kyrre, TORRESEN Jim a SEKANINA Lukáš. Evolutionary Digital Circuit Design with Fast Candidate Solution Establishment in Field Programmable Gate Arrays. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, s. 85-92. ISBN 978-1-4799-4480-4.
 DRAHOŠOVÁ Michaela, KOMJÁTHY Gergely a SEKANINA Lukáš. Towards Compositional Coevolution in Evolutionary Circuit Design. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, s. 157-164. ISBN 978-1-4799-4479-8.
 HRBÁČEK Radek a SEKANINA Lukáš. Towards Highly Optimized Cartesian Genetic Programming: From Sequential via SIMD and Thread to Massive Parallel Implementation. In: GECCO '14 Proceedings of the 2014 conference on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2014, s. 1015-1022. ISBN 978-1-4503-2662-9.
 MINAŘÍK Miloš a SEKANINA Lukáš. Exploring the Search Space of Hardware / Software Embedded Systems by Means of GP. In: Genetic Programming, 17th European Conference, EuroGP 2014. Berlin: Springer Verlag, 2014, s. 112-123. ISBN 978-3-662-44302-6.
 PETRLÍK Jiří, FUČÍK Otto a SEKANINA Lukáš. Multiobjective Selection of Input Sensors for SVR Applied to Road Traffic Prediction. In: Parallel Problem Solving from Nature - PPSN XIII. Heidelberg: Springer Verlag, 2014, s. 802-811. ISBN 978-3-319-10761-5.
 PETRLÍK Jiří, FUČÍK Otto a SEKANINA Lukáš. Multiobjective Selection of Input Sensors for Travel Times Forecasting Using Support Vector Regression. In: 2014 IEEE Symposium on Computational Intelligence in Vehicles and Transportation Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, s. 14-21. ISBN 978-1-4799-4498-9.
 PLESKACZ Witold, RENOVELL Michel, SEKANINA Lukáš, BERNARD Serge a KASPROWICZ Dominik, ed. IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Warsaw: IEEE Computer Society, 2014. ISBN 978-1-4799-4560-3.
 SEKANINA Lukáš a VAŠÍČEK Zdeněk. On Evolutionary Approximation of Logic Circuits. Computing with New Resources. Berlin: Springer Verlag, 2014, s. 367-378. ISBN 978-3-319-13349-2.
 SEKANINA Lukáš, PTÁK Ondřej a VAŠÍČEK Zdeněk. Cartesian Genetic Programming as Local Optimizer of Logic Networks. In: 2014 IEEE Congress on Evolutionary Computation. Beijing: IEEE Computational Intelligence Society, 2014, s. 2901-2908. ISBN 978-1-4799-1488-3.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Evolutionary Design of Approximate Multipliers Under Different Error Metrics. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warsaw: IEEE Computer Society, 2014, s. 135-140. ISBN 978-1-4799-4558-0.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. How to Evolve Complex Combinational Circuits From Scratch?. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, s. 133-140. ISBN 978-1-4799-4480-4.
2013DOBAI Roland a SEKANINA Lukáš. Image Filter Evolution on the Xilinx Zynq Platform. In: Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems. Torino: IEEE Circuits and Systems Society, 2013, s. 164-171. ISBN 978-1-4673-6381-5.
 DOBAI Roland a SEKANINA Lukáš. Towards Evolvable Systems Based on the Xilinx Zynq Platform. In: 2013 IEEE International Conference on Evolvable Systems (ICES). Singapur: IEEE Computational Intelligence Society, 2013, s. 89-95. ISBN 978-1-4673-5869-9.
 KORČEK Pavol, SEKANINA Lukáš a FUČÍK Otto. Advanced Approach to Calibration of Traffic Microsimulation Using Travel Times. Journal of Cellular Automata. Philadelphia: Old City Publishing, Inc., 2013, roč. 8, č. 6, s. 457-467. ISSN 1557-5969.
 MINAŘÍK Miloš a SEKANINA Lukáš. Concurrent Evolution of Hardware and Software for Application-Specific Microprogrammed Systems. In: 2013 IEEE International Conference on Evolvable Systems (ICES). Singapur: IEEE Computational Intelligence Society, 2013, s. 43-50. ISBN 978-1-4673-5869-9.
 PETRLÍK Jiří a SEKANINA Lukáš. Multiobjective evolution of approximate multiple constant multipliers. In: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2013. Brno: IEEE Computer Society, 2013, s. 116-119. ISBN 978-1-4673-6133-0.
 SALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, RIESGO Teresa a SEKANINA Lukáš. Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing. IEEE Transactions on Computers. 2013, roč. 62, č. 8, s. 1481-1493. ISSN 0018-9340.
 SEKANINA Lukáš a VAŠÍČEK Zdeněk. Approximate Circuit Design by Means of Evolvable Hardware. In: 2013 IEEE International Conference on Evolvable Systems (ICES). Singapur: IEEE Computer Society, 2013, s. 21-28. ISBN 978-1-4673-5847-7.
 SEKANINA Lukáš, FEY Görschwin, RAIK Jaan, AUNET Snorre a RŮŽIČKA Richard, ed. IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Brno: IEEE Computer Society, 2013. ISBN 978-1-4673-6133-0.
 SEKANINA Lukáš, RŮŽIČKA Richard, VAŠÍČEK Zdeněk, ŠIMEK Václav a HANÁČEK Petr. Implementing a Unique Chip ID on a Reconfigurable Polymorphic Circuit. Information Technology And Control. Kaunas: 2013, roč. 42, č. 1, s. 7-14. ISSN 1392-124X.
 SEKANINA Lukáš. Ubiquity symposium: Evolutionary computation and the processes of life: evolutionary computation in physical world. Ubiquity. 2013, roč. 2013, č. 2, s. 1-7. ISSN 1530-2180.
 VAŠÍČEK Zdeněk, BIDLO Michal a SEKANINA Lukáš. Evolution of efficient real-time non-linear image filters for FPGAs. Soft Computing. 2013, roč. 17, č. 11, s. 2163-2180. ISSN 1432-7643.
2012DRAHOŠOVÁ Michaela a SEKANINA Lukáš. Acceleration of Evolutionary Image Filter Design Using Coevolution in Cartesian GP. 8th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masarykova universita, 2012. ISBN 978-80-87342-15-2.
 DRAHOŠOVÁ Michaela a SEKANINA Lukáš. Acceleration of Evolutionary Image Filter Design Using Coevolution in Cartesian GP. Lecture Notes in Computer Science. 2012, roč. 2012, č. 7491, s. 163-172. ISBN 978-3-642-32936-4. ISSN 0302-9743.
 DRAHOŠOVÁ Michaela a SEKANINA Lukáš. Coevolution in Cartesian Genetic Programming. In: Proc. of the 15th European Conference on Genetic Programming. Heidelberg: Springer Verlag, 2012, s. 182-193. ISBN 978-3-642-29138-8.
 KORČEK Pavol, SEKANINA Lukáš a FUČÍK Otto. Calibration of Traffic Simulation Models Using Vehicle Travel Times. Lecture Notes in Computer Science. 2012, roč. 2012, č. 7495, s. 807-816. ISSN 0302-9743.
 KORČEK Pavol, SEKANINA Lukáš a FUČÍK Otto. Evolutionary approach to calibration of cellular automaton based traffic simulation model. In: Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems. Anchorage: IEEE Intelligent Transportation Systems Society, 2012, s. 122-129. ISBN 978-1-4673-3062-6.
 KOTÁSEK Zdeněk, BOUDA Jan, ČERNÁ Ivana, SEKANINA Lukáš, VOJNAR Tomáš a ANTOŠ David, ed. Mathematical and Engineering Methods in Computer Science, 7th International Doctoral Workshop, Revised Selected Papers. Berlin: Springer Verlag, 2012. ISBN 978-3-642-25928-9.
 PETRLÍK Jiří a SEKANINA Lukáš. Multiobjective Evolution of Multiple-Constant Multipliers. In: Proceedings of the 18th International Conference on Soft Computing (MENDEL2012). Brno: Fakulta strojního inženýrství VUT, 2012, s. 64-69. ISBN 978-80-214-4540-6.
 PETRLÍK Jiří, KORČEK Pavol, FUČÍK Otto, BESZÉDEŠ Marián a SEKANINA Lukáš. Estimation of missing values in traffic density maps. In: Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems. Anchorage: IEEE Intelligent Transportation Systems Society, 2012, s. 632-637. ISBN 978-1-4673-3062-6.
 SALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, RIESGO Teresa a SEKANINA Lukáš. Implementation Techniques for Evolvable HW Systems: Virtual vs. Dynamic Reconfiguration. In: Proc. of the 22nd International Conference on Field Programmable Logic and Applications (FPL). Oslo: IEEE Computer Society, 2012, s. 547-550. ISBN 978-1-4673-2257-7.
 SALVADOR Ruben, VIDAL Alberto, MORENO Felix, RIESGO Teresa a SEKANINA Lukáš. Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling. Microprocessors and Microsystems. Amsterdam: Elsevier Science, 2012, roč. 36, č. 5, s. 427-438. ISSN 0141-9331.
 SEKANINA Lukáš a SALAJKA Vojtěch. Towards New Applications of Multi-Function Logic: Image Multi-Filtering. In: Proc. of the 2012 Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2012, s. 824-827. ISBN 978-1-4577-2145-8.
 SEKANINA Lukáš a VAŠÍČEK Zdeněk. A SAT-based Fitness Function for Evolutionary Optimization of Polymorphic Circuits. In: Proc. of the 2012 Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2012, s. 715-720. ISBN 978-1-4577-2145-8.
 SEKANINA Lukáš, SALAJKA Vojtěch a VAŠÍČEK Zdeněk. Two-Step Evolution of Polymorphic Circuits for Image Multi-Filtering. In: 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012, s. 432-439. ISBN 978-1-4673-1508-1.
 SEKANINA Lukáš. Evolvable hardware. Handbook of Natural Computing. Berlin: Springer Verlag, 2012, s. 1657-1705. ISBN 978-3-540-92909-3.
 SMOLKA Tobiáš, ŠVENDA Petr, SEKANINA Lukáš a MATYÁŠ Václav. Evolutionary Design of Message Efficient Secrecy Amplification Protocols. In: Proc. of the 15th European Conference on Genetic Programming. Heidelberg: Springer Verlag, 2012, s. 194-205. ISBN 978-3-642-29138-8.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. On Area Minimization of Complex Combinational Circuits Using Cartesian Genetic Programming. In: 2012 IEEE World Congress on Computational Intelligence. CA: Institute of Electrical and Electronics Engineers, 2012, s. 2379-2386. ISBN 978-1-4673-1508-1.
 ŽALOUDEK Luděk a SEKANINA Lukáš. Cellular automata-based systems with fault-tolerance. Natural Computing. Berlin: Springer Verlag, 2012, roč. 11, č. 4, s. 673-685. ISSN 1567-7818.
2011GAJDA Zbyšek a SEKANINA Lukáš. Recent Advances in Evolutionary Synthesis and Optimization of Ordinary and Polymorphic Circuits. Brno: Fakulta informačních technologií VUT v Brně, 2011. ISBN 978-80-214-4417-1.
 GAJDA Zbyšek a SEKANINA Lukáš. On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits. Journal of Multiple-Valued Logic and Soft Computing. Philadelphia: Old City Publishing, Inc., 2011, roč. 17, č. 6, s. 607-631. ISSN 1542-3980.
 KORČEK Pavol, SEKANINA Lukáš a FUČÍK Otto. A Scalable Cellular Automata Based Microscopic Traffic Simulation. 7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masarykova universita, 2011. ISBN 978-80-214-4305-1.
 KORČEK Pavol, SEKANINA Lukáš a FUČÍK Otto. A Scalable Cellular Automata Based Microscopic Traffic Simulation. In: Proceedings of the IEEE Intelligent Vehicles Symposium 2011 (IV11). Baden-Baden: IEEE Intelligent Transportation Systems Society, 2011, s. 13-18. ISBN 978-1-4577-0889-3.
 KORČEK Pavol, SEKANINA Lukáš a FUČÍK Otto. Cellular automata based traffic simulation accelerated on GPU. In: Proceedings of the 17th International Conference on Soft Computing (MENDEL2011). Brno: Ústav automatizace a informatiky FSI VUT, 2011, s. 395-402. ISBN 978-80-214-4302-0.
 KORČEK Pavol, SEKANINA Lukáš a FUČÍK Otto. Microscopic traffic simulation using CUDA. In: Advanced Computer Architecture and Compilation for High-Performace and Embedded Systems (ACACES 2011) Poster Abstracts. Fiuggi: Academia Press, 2011, s. 207-210. ISBN 978-90-382-1798-7.
 MINAŘÍK Miloš a SEKANINA Lukáš. Evolution of Iterative Formulas Using Cartesian Genetic Programming. Lecture Notes in Computer Science. 2011, roč. 2011, č. 6881, s. 11-20. ISSN 0302-9743.
 OTERO Andres, SALVADOR Ruben, MORA Javier, DE la Torre Eduardo, RIESGO Teresa a SEKANINA Lukáš. A Fast Reconfigurable 2D HW Core Architecture on FPGAs for Evolvable Self-Adaptive Systems. In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011, s. 336-343. ISBN 978-1-4577-0599-1.
 RŮŽIČKA Richard, ŠIMEK Václav a SEKANINA Lukáš. Behavior of CMOS Polymorphic Circuits in High Temperature Environment. In: Proceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Cottbus: IEEE Computer Society, 2011, s. 447-452. ISBN 978-1-4244-9753-9.
 SALVADOR Ruben, MORENO Felix, RIESGO Teresa a SEKANINA Lukáš. Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems. EURASIP Journal on Advances in Signal Processing. 2011, roč. 2011, č. 2011, s. 1-20. ISSN 1687-6172.
 SALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, RIESGO Teresa a SEKANINA Lukáš. Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support. In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011, s. 184-191. ISBN 978-1-4577-0599-1.
 SALVADOR Ruben, OTERO Andres, MORA Javier, DE la Torre Eduardo, SEKANINA Lukáš a RIESGO Teresa. Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems. In: Proc. of the 2011 International Conference on ReConFigurable Computing and FPGAs. Los Alamitos: IEEE Computer Society, 2011, s. 164-169. ISBN 978-0-7695-4551-6.
 SALVADOR Ruben, VIDAL Alberto, MORENO Felix, RIESGO Teresa a SEKANINA Lukáš. Bio-inspired FPGA architecture for self-calibration of an image compression core based on wavelet transforms in embedded systems. In: VLSI Circuits and Systems V. Bellingham: SPIE - the international society for optics and photonics, 2011, s. 1-13. ISBN 978-0-8194-8656-1.
 SEKANINA Lukáš a KOMENDA Tomáš. Global Control in Polymorphic Cellular Automata. Journal of Cellular Automata. Philadelphia: Old City Publishing, Inc., 2011, roč. 6, č. 4, s. 301-321. ISSN 1557-5969.
 SEKANINA Lukáš a VAŠÍČEK Zdeněk. CGP Acceleration Using Field-Programmable Gate Arrays. Cartesian Genetic Programming. Berlin: Springer Verlag, 2011, s. 217-230. ISBN 978-3-642-17309-7.
 SEKANINA Lukáš, HARDING Simon L., BANZHAF Wolfgang a KOWALIW Taras. Image Processing and CGP. Cartesian Genetic Programming. Berlin: Springer Verlag, 2011, s. 181-215. ISBN 978-3-642-17309-7.
 SEKANINA Lukáš, WALKER James A., KAUFMANN Paul a PLATZNER Marco. Evolution of Electronic Circuits. Cartesian Genetic Programming. Berlin: Springer Verlag, 2011, s. 125-179. ISBN 978-3-642-17309-7.
 SEKANINA Lukáš. Evolution of digital circuits (Tutorial). In: Proceedings of the 2011 GECCO conference companion on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2011, s. 1343-1359. ISBN 978-1-4503-0690-4.
 SEKANINA Lukáš. Evolutionary hardware design (Invited Paper). In: VLSI Circuits and Systems V. Bellingham: SPIE - the international society for optics and photonics, 2011, s. 1-11. ISBN 978-0-8194-8656-1.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. A Global Postsynthesis Optimization Method for Combinational Circuits. In: Proc. of the Design, Automation and Test in Europe DATE 2011. Grenoble: European Design and Automation Association, 2011, s. 1525-1528. ISBN 978-3-9810801-7-9.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Evolutionary Optimization of Complex Digital Circuits. In: 7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masarykova universita, 2011, s. 1. ISBN 978-80-214-4305-1.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Extensions of Cartesian Genetic Programming for Optimization of Complex Combinational Circuits. In: Proc. of the 20th International Workshop on Logic and Synthesis. San Diego: University of California San Diego, 2011, s. 55-61.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware. Genetic Programming and Evolvable Machines. Berlin: Springer Verlag, 2011, roč. 12, č. 3, s. 305-327. ISSN 1389-2576.
 VAŠÍČEK Zdeněk, BIDLO Michal, SEKANINA Lukáš a GLETTE Kyrre. Evolutionary Design of Efficient and Robust Switching Image Filters. In: Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2011, s. 192-199. ISBN 978-1-4577-0599-1.
 ŽALOUDEK Luděk a SEKANINA Lukáš. Increasing Fault-Tolerance in Cellular-Based Systems. Lecture Notes in Computer Science. 2011, roč. 2011, č. 6714, s. 234-245. ISSN 0302-9743.
2010BIDLO Michal a SEKANINA Lukáš. On Impact of Environment on the Complexity Generated by Evolutionary Development. In: MENDEL 2010 - 16th International Conference on Soft Computing. Brno: Fakulta strojního inženýrství VUT, 2010, s. 501-508. ISBN 978-80-214-4120-0.
 FIŠER Petr, SCHMIDT Jan, VAŠÍČEK Zdeněk a SEKANINA Lukáš. On Logic Synthesis of Conventionally Hard to Synthesize Circuits Using Genetic Programming. In: Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010, s. 346-351. ISBN 978-1-4244-6610-8.
 GAJDA Zbyšek a SEKANINA Lukáš. An Efficient Selection Strategy for Digital Circuit Evolution. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2010, s. 13-24. ISBN 978-3-642-15322-8.
 GAJDA Zbyšek a SEKANINA Lukáš. When Does Cartesian Genetic Programming Minimize the Phenotype Size Implicitly?. In: Proceeding of Genetic and Evolutionary Computation Conference, GECCO 2010. New York: Association for Computing Machinery, 2010, s. 983-984. ISBN 978-1-4503-0072-8.
 KORČEK Pavol, SEKANINA Lukáš a FUČÍK Otto. Towards Scalable and Accurate Microscopic Traffic Simulation Using Advanced Cellular Automata Based Models. In: Proceedings of the 13th International IEEE Conference on Intelligent Transportation Systems Workshops. Madeira Island: IEEE Intelligent Transportation Systems Society, 2010, s. 27-35. ISBN 978-972-8822-20-0.
 SALVADOR Ruben, MORENO Felix, RIESGO Teresa a SEKANINA Lukáš. Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems. In: Proc. of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2010, s. 177-184. ISBN 978-1-4244-5888-2.
 SALVADOR Ruben, MORENO Felix, RIESGO Teresa a SEKANINA Lukáš. High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs. In: Proc. of 13th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2010, s. 96-103. ISBN 978-0-7695-4171-6.
 SALVADOR Ruben, MORENO Felix, RIESGO Teresa a SEKANINA Lukáš. Implementation of bio-inspired adaptive wavelet transforms in FPGAs. Modelling, validation and profiling of the algorithm. In: Proceedings of the XXV Conference on Design of Circuits and Integrated Systems. Lanzarote: Universidad de Las Palmas de Gran Canaria, 2010, s. 210-215. ISBN 978-84-693-7393-4.
 SEKANINA Lukáš. Evolutionary Circuit Design: Tutorial. In: Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010, s. 5-5. ISBN 978-1-4244-6610-8.
 SEKANINA Lukáš. Evoluční návrh elektronických obvodů. Automa. 2010, roč. 2010, č. 1, s. 48-51. ISSN 1210-9592.
 SEKANINA Lukáš. Evoluční návrh hardware. Umelá inteligencia a kognitívna veda II. Bratislava: Vydavateľstvo STU, 2010, s. 437-465. ISBN 978-80-227-3284-0.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Hardware Accelerator of Cartesian Genetic Programming with Multiple Fitness Units. Computing and Informatics. Bratislava: Slovak Academic Press, 2010, roč. 29, č. 6, s. 1359-1371. ISSN 1335-9150.
 VAŠÍČEK Zdeněk, SEKANINA Lukáš a BIDLO Michal. A Method for Design of Impulse Bursts Noise Filters Optimized for FPGA Implementations. In: DATE 2010: Design, Automation and Test in Europe. Dresden: European Design and Automation Association, 2010, s. 1731-1736. ISBN 978-3-9810801-6-2.
 ŠIMEK Václav, RŮŽIČKA Richard a SEKANINA Lukáš. On Analysis of Fabricated Polymorphic Circuits. In: Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010, s. 281-284. ISBN 978-1-4244-6610-8.
 ŠIMÁČEK Jiří, SEKANINA Lukáš a STAREČEK Lukáš. Evolutionary Design of Reconfiguration Strategies to Reduce the Test Application Time. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2010, s. 214-225. ISBN 978-3-642-15322-8.
 ŽALOUDEK Luděk, SEKANINA Lukáš a ŠIMEK Václav. Accelerating Cellular Automata Evolution on Graphics Processing Units. International Journal on Advances in Software. 2010, roč. 3, č. 1, s. 294-303. ISSN 1942-2628.
2009GAJDA Zbyšek a SEKANINA Lukáš. Gate-Level Optimization of Polymorphic Circuits Using Cartesian Genetic Programming. In: Proc. of 2009 IEEE Congress on Evolutionary Computation. NA: IEEE Computational Intelligence Society, 2009, s. 1599-1604. ISBN 978-1-4244-2958-5.
 NEGOITA Mircea, SEKANINA Lukáš a STOICA Adrian. Adaptive and evolvable hardware and systems: the state of the art and the prospectus for future development. Journal of Automation, Mobile Robotics and Intelligent Systems. 2009, roč. 3, č. 2, s. 70-75. ISSN 1897-8649.
 SEKANINA Lukáš, RŮŽIČKA Richard a GAJDA Zbyšek. Polymorphic FIR Filters with Backup Mode Enabling Power Savings. In: Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2009, s. 43-50. ISBN 978-0-7695-3714-6.
 SEKANINA Lukáš, RŮŽIČKA Richard, VAŠÍČEK Zdeněk, PROKOP Roman a FUJCIK Lukáš. REPOMO32 - New Reconfigurable Polymorphic Integrated Circuit for Adaptive Hardware. In: Proc. of the 2009 IEEE Symposium Series on Computational Intelligence - Workshop on Evolvable and Adaptive Hardware. Nashville: IEEE Computational Intelligence Society, 2009, s. 39-46. ISBN 978-1-4244-2755-0.
 SEKANINA Lukáš, VAŠÍČEK Zdeněk, RŮŽIČKA Richard, BIDLO Michal, JAROŠ Jiří a ŠVENDA Petr. Evoluční hardware: Od automatického generování patentovatelných invencí k sebemodifikujícím se strojům. Praha: Nakladatelství Academia, 2009. ISBN 978-80-200-1729-1.
 SEKANINA Lukáš. Evolvable Hardware: From Applications to Implications for the Theory of Computation. In: Proc. of the 8th Int. Conference on Unconventional Computation. Berlin: Springer Verlag, 2009, s. 24-36. ISBN 978-3-642-03744-3.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Efficient Hardware Accelerator for Symbolic Regression Problems. In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Znojmo: Masarykova universita, 2009, s. 192-199. ISBN 978-80-87342-04-6.
 VAŠÍČEK Zdeněk, BIDLO Michal, SEKANINA Lukáš, TORRESEN Jim, GLETTE Kyrre a FURUHOLMEN Marcus. Evolution of Impulse Bursts Noise Filters. In: Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2009, s. 27-34. ISBN 978-0-7695-3714-6.
 ŠVENDA Petr, SEKANINA Lukáš a MATYÁŠ Václav. Evolutionary Design of Secrecy Amplification Protocols for Wireless Sensor Networks. In: Proc. of the ACM Conference on Wireless Network Security. New York: Association for Computing Machinery, 2009, s. 225-236. ISBN 978-1-60558-460-7.
 ŽALOUDEK Luděk, SEKANINA Lukáš a ŠIMEK Václav. GPU Accelerators for Evolvable Cellular Automata. In: Computation World: Future Computing, Service Computation, Adaptive, Content, Cognitive, Patterns. Athens: Institute of Electrical and Electronics Engineers, 2009, s. 533-537. ISBN 978-0-7695-3862-4.
2008HORNBY Gregory S., SEKANINA Lukáš a HADDOW Pauline C., ed. Proceedings of Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2008. ISBN 978-3-540-85856-0.
 NEGOITA Mircea, SEKANINA Lukáš a STOICA Adrian. Adaptive and Evolvable Hardware and Systems: The State of the Art and the Prospectus for Future Development. In: Knowledge-Based Intelligent Information and Engineering Systems. Berlin: Springer Verlag, 2008, s. 310-318. ISBN 978-3-540-85566-8.
 PEČENKA Tomáš, SEKANINA Lukáš a KOTÁSEK Zdeněk. Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability. ACM Transactions on Design Automation of Electronic Systems. 2008, roč. 13, č. 3, s. 1-21. ISSN 1084-4309.
 RŮŽIČKA Richard, SEKANINA Lukáš a PROKOP Roman. Physical Demonstration of Polymorphic Self-checking Circuits. In: Proc. of the 14th IEEE Int. On-Line Testing Symposium. Los Alamitos: IEEE Computer Society, 2008, s. 31-36. ISBN 978-0-7695-3264-6.
 SEKANINA Lukáš a MIKUŠEK Petr. Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures. In: Applications of Evolutionary Computing. Berlin: Springer Verlag, 2008, s. 144-153. ISBN 978-3-540-78760-0.
 SEKANINA Lukáš, STAREČEK Lukáš, KOTÁSEK Zdeněk a GAJDA Zbyšek. Polymorphic Gates in Design and Test of Digital Circuits. International Journal of Unconventional Computing. Philadelphia: Old City Publishing, Inc., 2008, roč. 4, č. 2, s. 125-142. ISSN 1548-7199.
 STAREČEK Lukáš, SEKANINA Lukáš a KOTÁSEK Zdeněk. Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration. In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Bratislava: IEEE Computer Society, 2008, s. 255-258. ISBN 978-1-4244-2276-0.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Hardware Accelerators for Cartesian Genetic Programming. In: Eleventh European Conference on Genetic Programming. Berlin: Springer Verlag, 2008, s. 230-241. ISBN 978-3-540-78670-2.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Novel Hardware Implementation of Adaptive Median Filters. In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Bratislava: IEEE Computer Society, 2008, s. 110-115. ISBN 978-1-4244-2276-0.
 VAŠÍČEK Zdeněk, ŽÁDNÍK Martin, SEKANINA Lukáš a TOBOLA Jiří. On Evolutionary Synthesis of Linear Transforms in FPGA. In: Evolvable Systems: From Biology > to > Hardware. Berlin: Springer Verlag, 2008, s. 141-152. ISBN 978-3-540-85856-0.
 VAŠÍČEK Zdeněk, ČAPKA Ladislav a SEKANINA Lukáš. Analysis of Reconfiguration Options for a Reconfigurable Polymorphic Circuit. In: Proc. of the 2008 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2008, s. 3-10. ISBN 978-0-7695-3166-3.
 ŽALOUDEK Luděk a SEKANINA Lukáš. Transistor-level Evolution of Digital Circuits Using a Special Circuit Simulator. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2008, s. 320-331. ISBN 978-3-540-85856-0.
2007GAJDA Zbyšek a SEKANINA Lukáš. Reducing the Number of Transistors in Digital Circuits Using Gate-Level Evolutionary Design. In: 2007 Genetic and Evolutionary Computation Conference. New York: Association for Computing Machinery, 2007, s. 245-252. ISBN 9781595936974.
 SEKANINA Lukáš a MARTÍNEK Tomáš. Evolving Image Operators Directly in Hardware. Genetic and Evolutionary Computation for Image Processing and Analysis. New York: Hindawi Publishing Corporation, 2007, s. 93-112. ISBN 978-977-454-001-1.
 SEKANINA Lukáš. Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates. In: 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Gliwice: IEEE Computer Society, 2007, s. 243-246. ISBN 1424411610.
 SEKANINA Lukáš. Evolution of Polymorphic Self-Checking Circuits. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2007, s. 186-197. ISBN 978-3-540-74625-6.
 SEKANINA Lukáš. Evolutionary Functional Recovery in Virtual Reconfigurable Circuits. ACM Journal on Emerging Technologies in Computing Systems. 2007, roč. 3, č. 2, s. 1-22. ISSN 1550-4832.
 SEKANINA Lukáš. Evolvable hardware: Tutorial. In: 2007 Genetic and Evolutionary Computational Conference. New York: Association for Computing Machinery, 2007, s. 3627-3644. ISBN 9781595936981.
 SEKANINA Lukáš. Evolved Computing Devices and the Implementation Problem. Minds and Machines. 2007, roč. 17, č. 3, s. 311-329. ISSN 0924-6495.
 SEKANINA Lukáš. Vztah mezi abstraktním a fyzickým výpočtem v kontextu evolučního návrhu. In: Kognice a umělý život VII. Opava: Slezská univerzita v Opavě, 2007, s. 305-310. ISBN 9788072484126.
 SLANÝ Karel a SEKANINA Lukáš. Fitness Landscape Analysis and Image Filter Evolution Using Functional-Level CGP. In: Genetic Programming, 10th European Conference, EuroGP 2007. Berlin: Springer Verlag, 2007, s. 311-320. ISBN 978-3-540-71602-0.
 STAREČEK Lukáš, SEKANINA Lukáš, GAJDA Zbyšek, KOTÁSEK Zdeněk, PROKOP Roman a MUSIL Vladislav. On Properties and Utilization of Some Polymorphic Gates. In: 6th Electronic Circuits and Systems Conference (ECS 2007). Bratislava: Fakulta informatiky a informačních technologií Slovenská technická univerzita v Bratislavě, 2007, s. 77-81. ISBN 978-80-227-2697-9.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs. In: Proc. of 2007 International Conference on Field Programmable Logic and Applications. Los Alamitos: IEEE Computer Society, 2007, s. 216-221. ISBN 1424410606.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. An Evolvable Hardware System in Xilinx Virtex II Pro FPGA. International Journal of Innovative Computing and Applications. Geneva: Inderscience Publishers, 2007, roč. 1, č. 1, s. 63-73. ISSN 1751-648X.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Evaluation of a New Platform For Image Filter Evolution. In: Proc. of the 2007 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2007, s. 577-584. ISBN 076952866X.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Reducing the Area on a Chip Using a Bank of Evolved Filters. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2007, s. 222-232. ISBN 978-3-540-74625-6.
2006BIDLO Michal a SEKANINA Lukáš. Prostředky pro podporu vzdělávání v oblasti biologií inspirovaných výpočetních systémů. In: Pedagogický software 2006. České Budějovice: Scientifik Pedagogical Publishing, 2006, s. 81-83. ISBN 80-85645-56-4.
 BIDLO Michal, BIDLO Radek a SEKANINA Lukáš. Designing a Novel General Sorting Network Constructor Using Artificial Evolution. TRANSACTIONS ON ENGINEERING, COMPUTING AND TECHNOLOGY. Barcelona: World Enformatika Society, 2006, roč. 15, č. 10, s. 85-90. ISBN 975-00803-4-3. ISSN 1305-5313.
 PEČENKA Tomáš, KOTÁSEK Zdeněk a SEKANINA Lukáš. FITTest_BENCH06: A New Set of Benchmark Circuits Reflecting Testability Properties. In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Praha: IEEE Computer Society, 2006, s. 285-289. ISBN 1424401844.
 PEČENKA Tomáš, STRNADEL Josef, KOTÁSEK Zdeněk a SEKANINA Lukáš. Testability Estimation Based on Controllability and Observability Parameters. In: Proceedings of the 9th EUROMICRO Conference on Digital System Design (DSD'06). Cavtat: IEEE Computer Society, 2006, s. 504-514. ISBN 0-7695-2609-8.
 RŮŽIČKA Richard a SEKANINA Lukáš. Evolutionary Circuit Design in REPOMO - Reconfigurable Polymorphic Module. In: Proceedings of the Second IASTED International Conference on Computational Intelligence. Anaheim: ACTA Press, 2006, s. 237-241. ISBN 0-88986-602-3.
 SEKANINA Lukáš a VAŠÍČEK Zdeněk. On the Practical Limits of the Evolutionary Digital Filter Design at the Gate Level. In: Applications of Evolutionary Computing. Berlin: Springer Verlag, 2006, s. 344-355. ISBN 978-3-540-33237-4.
 SEKANINA Lukáš, MARTÍNEK Tomáš a GAJDA Zbyšek. Extrinsic and Intrinsic Evolution of Multifunctional Combinational Modules. In: 2006 IEEE World Congress on Computational Intelligence. CA: IEEE Computational Intelligence Society, 2006, s. 9676-9683. ISBN 0-7803-9489-5.
 SEKANINA Lukáš, STAREČEK Lukáš a KOTÁSEK Zdeněk. Novel Logic Circuits Controlled by Vdd. In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Praha: IEEE Computer Society, 2006, s. 85-86. ISBN 1424401844.
 SEKANINA Lukáš, STAREČEK Lukáš, GAJDA Zbyšek a KOTÁSEK Zdeněk. Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage. In: Proc. of the 1st NASA/ESA Conference on Adaptive Hardware and Systems. Piscataway: IEEE Computer Society, 2006, s. 186-193. ISBN 0-7695-2614-4.
 SEKANINA Lukáš. Evolutionary Approach to the Implementation Problem. Brno: Fakulta informačních technologií VUT v Brně, 2006.
 SEKANINA Lukáš. Evolutionary Design of Digital Circuits: Where Are Current Limits?. In: Proc. of the 1st NASA/ESA Conference on Adaptive Hardware and Systems. Piscataway: IEEE Computer Society, 2006, s. 171-178. ISBN 0-7695-2614-4.
 SEKANINA Lukáš. On Dependability of FPGA-Based Evolvable Hardware Systems That Utilize Virtual Reconfigurable Circuits. In: Computing Frontiers 2006 Conference. New York: Association for Computing Machinery, 2006, s. 221-228. ISBN 1595933026.
 ZEBULUM Ricardo S., KEYMEULEN Didier, RAMESHAM Rajeshuni, SEKANINA Lukáš, MAO James, KUMAR Nikhil a STOICA Adrian. Characterization and Synthesis of Circuits at Extreme Low Temperatures. Evolvable Hardware. Berlin: Springer Verlag, 2006, s. 161-172. ISBN 0-387-24386-0.
2005BIDLO Michal a SEKANINA Lukáš. Providing Information from the Environment for Growing Electronic Circuits Through Polymorphic Gates. In: Proc. of Genetic and Evolutionary Computation Conference - Workshops 2005. New York: Association for Computing Machinery, 2005, s. 242-248. ISBN 1-59593-097-3.
 KOŘENEK Jan a SEKANINA Lukáš. Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2005, s. 46-55. ISBN 978-3-540-28736-0.
 MARTÍNEK Tomáš a SEKANINA Lukáš. An Evolvable Image Filter: Experimental Evaluation of a Complete Hardware Implementation in FPGA. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2005, s. 76-85. ISBN 978-3-540-28736-0.
 PEČENKA Tomáš, KOTÁSEK Zdeněk, SEKANINA Lukáš a STRNADEL Josef. Automatic Discovery of RTL Benchmark Circuits with Predefined Testability Properties. In: Proc. of the 2005 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2005, s. 51-58. ISBN 0-7695-2399-4.
 SEKANINA Lukáš a BIDLO Michal. Evolutionary Design of Arbitrarily Large Sorting Networks Using Development. Genetic Programming and Evolvable Machines. Berlin: Springer Verlag, 2005, roč. 6, č. 3, s. 319-347. ISSN 1389-2576.
 SEKANINA Lukáš a ZEBULUM Ricardo S. Evolutionary discovering of the concept of the discrete state at the transistor level. In: Proc. of the 2005 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2005, s. 73-78. ISBN 0-7695-2399-4.
 SEKANINA Lukáš a ZEBULUM Ricardo S. Intrinsic Evolution of Controllable Oscillators in FPTA-2. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2005, s. 98-107. ISBN 978-3-540-28736-0.
 SEKANINA Lukáš. Design Methods for Polymorphic Digital Circuits. In: Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop. Sopron: University of West Hungary, 2005, s. 145-150. ISBN 9639364487.
 SEKANINA Lukáš. Evolutionary Design of Gate-Level Polymorphic Digital Circuits. In: Applications of Evolutionary Computation. Berlin: Springer Verlag, 2005, s. 185-194. ISBN 978-3-540-25396-9.
 SEKANINA Lukáš. Evoluční design poráží řešení vytvořená kreativním návrhářem. Vesmír. 2005, roč. 84, č. 1, s. 44-46. ISSN 0042-4544.
 STRNADEL Josef, PEČENKA Tomáš a SEKANINA Lukáš. On Testability Analysis Driven Generation of Synthetic Register-Transfer Level Benchmark Circuits. In: Proceedings of 5th Electronic Circuits and Systems Conference. Bratislava: Slovenská technická univerzita v Bratislavě, 2005, s. 107-110.
 ZEBULUM Ricardo S., STOICA Adrian, KEYMEULEN Didier a SEKANINA Lukáš. Evolvable Hardware System at Extreme Low Temperatures. In: Evolvable Systems: From Biology to Hardware. Berlin: Springer Verlag, 2005, s. 37-45. ISBN 978-3-540-28736-0.
2004FRIEDL Štěpán a SEKANINA Lukáš. The First Circuits Evolved in a Physical Virtual Reconfigurable Device. In: Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Bratislava: Slovenská akademie věd, 2004, s. 35-42. ISBN 80-969117-9-1.
 KOTÁSEK Zdeněk, PEČENKA Tomáš, SEKANINA Lukáš a STRNADEL Josef. Evolutionary Design of Synthetic RTL Benchmark Circuits. In: Informal Digest of Papers, IEEE European Test Workshop 2004. Montpellier: IEEE Computer Society, 2004, s. 107-108. ISBN 000000000.
 KOTÁSEK Zdeněk, PEČENKA Tomáš, STRNADEL Josef, MIKA Daniel a SEKANINA Lukáš. An Overview of Research Activities in Digital Circuit Diagnosis and Benchmarking. In: Proceedings of the Sixth Internation Scientific Conference Electronic Computers nad Informatics 2004. Košice: Technická univerzita v Košiciach, 2004, s. 229-234. ISBN 80-8073-150-0.
 RŮŽIČKA Richard a SEKANINA Lukáš. A Platform for Demonstration of Analogue and Digital Circuits Evolution. In: Proceedings of the Sixth Internation Scientific Conference Electronic Computers nad Informatics 2004. Košice: Technická univerzita v Košiciach, 2004, s. 158-163. ISBN 80-8073-150-0.
 SEKANINA Lukáš a DRÁBEK Vladimír. Theory and Applications of Evolvable Embedded Systems. In: Proc. of the 11th IEEE Int. Conference and Workshop on the Engineering of Computer-Based Systems. Los Alamitos, CA: IEEE Computer Society Press, 2004, s. 186-193. ISBN 0-7695-2125-8.
 SEKANINA Lukáš a FRIEDL Štěpán. An Evolvable Combinational Unit for FPGAs. Computing and Informatics. Bratislava: Slovak Academic Press, 2004, roč. 23, č. 5, s. 461-486. ISSN 1335-9150.
 SEKANINA Lukáš a FRIEDL Štěpán. On Routine Implementation of Virtual Evolvable Devices Using COMBO6. In: Proc. of the 2004 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2004, s. 63-70. ISBN 0-7695-2145-2.
 SEKANINA Lukáš. Evolutionary Design Space Exploration for Median Circuits. Lecture Notes in Computer Science. 2004, roč. 2004, č. 3005, s. 240-249. ISSN 0302-9743.
 SEKANINA Lukáš. Evolvable computing by means of evolvable components. Natural Computing. Dordrecht: Kluwer Academic Publishers, 2004, roč. 3, č. 3, s. 323-355. ISSN 15677818.
 SEKANINA Lukáš. Evolving Constructors for Infinitely Growing Sorting Networks and Medians. Lecture Notes in Computer Science. 2004, roč. 2004, č. 2932, s. 314-323. ISSN 0302-9743.
 TORRESEN Jim, BAKKE Jorgen W. a SEKANINA Lukáš. Efficient Image Filtering and Information Reduction in Reconfigurable Logic. In: Proc. of 2004 Norchip conference. Oslo: IEEE Computer Society Press, 2004, s. 63-66. ISBN 0-7803-8510-1.
 TORRESEN Jim, BAKKE Jorgen W. a SEKANINA Lukáš. Efficient Recognition of Speed Limit Signs. In: Proc. of the 7th International IEEE Conference on Intelligent Transportation Systems. Los Alamos: IEEE Computer Society Press, 2004, s. 652-656. ISBN 0-7803-8501-2.
 TORRESEN Jim, BAKKE Jorgen W. a SEKANINA Lukáš. Recognizing Speed Limit Sign Numbers by Evolvable Hardware. Lecture Notes in Computer Science. 2004, roč. 2004, č. 3242, s. 682-691. ISSN 0302-9743.
 VAŠÍČEK Zdeněk a SEKANINA Lukáš. Evoluční návrh kombinačních obvodů. Elektrorevue - www.elektrorevue.cz. Brno: 2004, roč. 2004, č. 43, s. 1-6. ISSN 1213-1539.
2003KOTÁSEK Zdeněk, RŮŽIČKA Richard a SEKANINA Lukáš, ed. Sborník pracovního semináře "Počítačové architektury a diagnostika" pro studenty doktorského studia. Brno: Ústav počítačových systémů FIT VUT v Brně, 2003. ISBN 80-214-2471-0.
 SEKANINA Lukáš a RŮŽIČKA Richard. Easily Testable Image Operators: The Class of Circuits Where Evolution Beats Engineers. In: The 2003 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2003, s. 135-144. ISBN 0-7695-1977-6.
 SEKANINA Lukáš a RŮŽIČKA Richard. On the Automatic Design of Testable Circuits. In: Proceedings of IEEE Workshop on Design nad Diagnostics of Electronic Circuits and Systems. Poznań: Publishing House of Poznan University of Technology, 2003, s. 299-300. ISBN 83-7143-557-6.
 SEKANINA Lukáš. Evolvable Components - From Theory to Hardware Implementations. Berlin: Springer Verlag, 2003. ISBN 3-540-40377-9.
 SEKANINA Lukáš. From Implementations to a General Concept of Evolvable Machines. Lecture Notes in Computer Science. 2003, roč. 2003, č. 2610, s. 424-433. ISSN 0302-9743.
 SEKANINA Lukáš. Towards Evolvable IP Cores for FPGAs. In: Proc. of The 2003 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2003, s. 145-154. ISBN 0-7695-1977-6.
 SEKANINA Lukáš. Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware. Lecture Notes in Computer Science. 2003, roč. 2003, č. 2606, s. 186-197. ISSN 0302-9743.
2002DRÁBEK Vladimír a SEKANINA Lukáš. Basic Principles of Bio-Inspired Approaches to Fault Tolerance: Tutorial. In: Design for Test of Systems on Chip: Digital Test. Tallinn: Tallinna Tehnikaülikool, 2002, s. 1-48. ISBN 0000-00-000-0.
 SEKANINA Lukáš a DRÁBEK Vladimír. A Survey of Bioinspired Methods for Design of Fault Tolerant Reconfigurable Architectures. In: Proc. of the 8th Biennial Baltic Electronics Conference. Tallinn: Tallinna Tehnikaülikool, 2002, s. 355-358. ISBN 9985-59-292-1.
 SEKANINA Lukáš a DRÁBEK Vladimír. Automatic Design of Image Operators Using Evolvable Hardware. In: Proc. of 5th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Brno: Vysoké učení technické v Brně, 2002, s. 132-139. ISBN 80-214-2094-4.
 SEKANINA Lukáš a DRÁBEK Vladimír. Soft-hardware. Vesmír. 2002, roč. 81, č. 7, s. 393-395. ISSN 0042-4544.
 SEKANINA Lukáš a TORRESEN Jim. Detection of Norwegian Speed Limit Signs. In: Proc. of the 16th European Simulation Multiconference. Delft: SCS Publication House, 2002, s. 337-340. ISBN 90-77039-07-4.
 SEKANINA Lukáš. Automata of Evolvable Computational Machines. In: Proc. ot 8th conference Student EEICT. Brno: Vysoké učení technické v Brně, 2002, s. 491-495. ISBN 80-214-2116-9.
 SEKANINA Lukáš. Evolution of digital circuits operating as image filters in dynamically changing environment. In: Mendel 2002 - 8th International Conference on Soft Computing. Brno: Vysoké učení technické v Brně, 2002, s. 33-38. ISBN 80-214-2135-5.
 SEKANINA Lukáš. Evolvable Computational Machines: Formal Approach. In: Intelligent Technologies - Theory and Applications, E-ISCI 2002. Amsterdam: IOS Press, 2002, s. 166-172. ISBN 1-58603-256-9.
 SEKANINA Lukáš. Image Filter Design with Evolvable Hardware. Lecture Notes in Computer Science. 2002, roč. 2002, č. 2279, s. 255-266. ISSN 0302-9743.
 SEKANINA Lukáš. Nanostructures and bio-inspired computer engineering (Abstract). In: Nano'02 (Abstracts). Brno: Akademické nakladatelství CERM sro., 2002, s. 74-74. ISBN 80-7204-258-0.
 SEKANINA Lukáš. Nanostructures and bio-inspired computer engineering. In: Proceedings of Nano02. Ostrava: Repronis, 2002, s. 233-236. ISBN 80-7329-027-8.
 SLLAME Azeddien M. a SEKANINA Lukáš. An Evolutionary-Based Algorithm to the Module Selection Problem with Resource Sharing in High-Level Synthesis. In: Advances in Nature-Inspired Computation: The PPSN VII Workshops. Reading: PEDAL, Department of Computer Science, University of Reading, 2002, s. 45-46. ISBN 0-9543481-0-9.
 SLLAME Azeddien M. a SEKANINA Lukáš. An Evolutionary-Based Algorithm to the Module Selection Process in High-Level Synthesis. In: Mendel 2002 - 8th International Conference on Soft Computing. Brno: Vysoké učení technické v Brně, 2002, s. 87-92. ISBN 80-214-2135-5.
2001SEKANINA Lukáš a DVOŘÁK Václav. A Totally Distributed Genetic Algorithm: From a Cellular System to the Mesh of Processors. In: Modelling and Simulation 2001. Prague: Fakulta elektrotechniky ČVUT, 2001, s. 539-543. ISBN 1-56555-225-3.
2000RŮŽIČKA Richard a SEKANINA Lukáš. The Role of Simulation During Design of Evolvable Systems. In: Proc. of 22-nd International Colloquium Advanced Simulation of Systems 2000. Ostrava: MARQ, 2000, s. 85-90. ISBN 80-85988-51-8.
 SEKANINA Lukáš a DRÁBEK Vladimír. Fault Tolerance and Reconfiguration in Cellular Systems. In: Proc. of Design and Diagnostics of Electronic Circuits and Systems - IEEE DDECS'2000. Smolenice: neznámá, 2000, s. 134-137. ISBN 80-968320-3-4.
 SEKANINA Lukáš a DRÁBEK Vladimír. Relation Between Fault Tolerance and Reconfiguration in Cellular Systems. In: 6th IEEE Int. On-Line Testing Workshop. Palma de Mallorca, Spain: IEEE Computer Society Press, 2000, s. 25-30. ISBN 0-7695-0646-1.
 SEKANINA Lukáš a DRÁBEK Vladimír. The Concept of Pseudo Evolvable Hardware. In: IFAC Workshop on Programmable Devices and Systems 2000. Elsevier Science Ltd. Oxford: neznámá, 2000, s. 6. ISBN 0-08-043620-X.
 SEKANINA Lukáš a RŮŽIČKA Richard. Design of the Special Fast Reconfigurable Chip Using Common FPGA. In: Proc. of Design and Diagnostics of Electronic Circuits and Systems - IEEE DDECS'2000. Smolenice: neznámá, 2000, s. 161-168. ISBN 80-968320-3-4.
 SEKANINA Lukáš a SLLAME Azeddien M. Toward Uniform Approach to Design of Evolvable Hardware Based Systems. Lecture Notes in Computer Science. 2000, roč. 2000, č. 1896, s. 814-817. ISSN 0302-9743.
 SEKANINA Lukáš. Components and Communications in Evolvable System. In: Sborník prací studentů a doktorandů. Brno: Akademické nakladatelství CERM sro., 2000, s. 231-233. ISBN 80-7204-155-X.
 SLLAME Azeddien M. a SEKANINA Lukáš. Simulation and Modeling of Evolvable Hardware Based Systems. In: MS2000 International Conference on Modeling and Simulation. Las Palmas de Gran Canaria: neznámá, 2000, s. 485-492. ISBN 84-95286-59-9.
1999SEKANINA Lukáš a DRÁBEK Vladimír. Evolvable hardware - evoluce na čipu. Elektrorevue - www.elektrorevue.cz. Brno: 1999, roč. 1, č. 5, s. 5. ISSN 1213-1539.
 SEKANINA Lukáš. Evolvable Hardware as Non-Linear Predictor for Image Compression. In: Proc. of the 2nd Prediction Conference Nostradamus'99. Zlín: neznámá, 1999, s. 87-92. ISBN 80-214-1424-3.
 SEKANINA Lukáš. Komprese obrazu s využitím modelu evolvable hardware. Sborník prací studentů a doktorandů, FEI VUT Brno. Brno: Akademické nakladatelství CERM sro., 1999, s. 103-104. ISBN 80-214-1155-4.
 SEKANINA Lukáš. Komprese obrazu s využitím modelu evolvable hardware. In: Konference Tvůrčí činnost studentů oboru VTI - TCS'99. Brno: Ústav informatiky a výpočetní techniky FEI VUT, 1999, s. 12.
1998SEKANINA Lukáš. Model vyvíjejících se obvodů. Sborník prací studentů a doktorandů, roč. IV, FEI VUT Brno. Brno: Akademické nakladatelství CERM sro., 1998, s. 61-62. ISBN 80-214-1141-4.

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