Prof. Ing. Lukáš Sekanina, Ph.D.

SEKANINA Lukáš, VAŠÍČEK Zdeněk, BOSIO Alberto, TRAIOLA Marcello, RECH Paolo, OLIVEIRA Daniel, FERNANDES Fernando and DI Carlo Stefano. Special Session: How Approximate Computing impacts Verification, Test and Reliability. 2018 IEEE 36th VLSI Test Symposium. San Francisco: IEEE Computer Society, 2018. ISBN 978-1-5386-3774-6.
Publication language:english
Original title:Special Session: How Approximate Computing impacts Verification, Test and Reliability
Title (cs):Speciální sekce: Jak aproximativní počítání ovlivňuje verifikaci, testování a spolehlivost
Pages:1
Book:2018 IEEE 36th VLSI Test Symposium
Conference:IEEE VLSI Test Symposium 2018
Place:San Francisco, US
Year:2018
ISBN:978-1-5386-3774-6
DOI:10.1109/VTS.2018.8368628
Publisher:IEEE Computer Society
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Keywords
digital circuit, approximate computing, verification, test, reliability
Annotation
A new design paradigm -- approximate computing -- was established to investigate how computer systems can be made better -- more energy efficient, faster, and less complex -- by relaxing the requirement that they are exactly correct. The purpose of this special session is to introduce and discuss how approximate computing can and how impact the verification, the test and the reliability of digital circuits. The presentations of the special session will propose two views: (i): how the approximate computing paradigm impacts the design and manufacturing flow of integrated circuits; (ii): how the verification, testing and reliability disciplines can be exploited in the approximate computing paradigms.

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