Publication Details

Evolutionary Design of Approximate Multipliers Under Different Error Metrics

VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Design of Approximate Multipliers Under Different Error Metrics. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warsaw: IEEE Computer Society, 2014, pp. 135-140. ISBN 978-1-4799-4558-0.
Czech title
Evoluční návrh přibližných násobiček pro různá chybová kritéria
Type
conference paper
Language
english
Authors
Keywords

approximate circuit, multiplier, evolutionary design

Abstract


Approximate circuits are digital circuits which are intentionally designed in such a way that the specification is not met in terms of functionality in order to obtain some improvements in power consumption, performance or area, in comparison with fully functional circuits. In this paper, we propose to design approximate circuits using evolutionary design techniques. In particular, different error metrics are utilized to assess the circuit functionality. The proposed method begins with a fully functional circuit which is then intentionally degraded by Cartesian genetic programming (CGP) to obtain a circuit with a predefined error. In the second phase, CGP is used to minimize the number of gates or another error criterion. The effect of various error metrics on the search performance, area and power consumption is evaluated in the task of multiplier design.

Published
2014
Pages
135-140
Proceedings
17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
Conference
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2014, Warsaw, PL
ISBN
978-1-4799-4558-0
Publisher
IEEE Computer Society
Place
Warsaw, PL
DOI
UT WoS
000346734200027
EID Scopus
BibTeX
@INPROCEEDINGS{FITPUB10513,
   author = "Zden\v{e}k Va\v{s}\'{i}\v{c}ek and Luk\'{a}\v{s} Sekanina",
   title = "Evolutionary Design of Approximate Multipliers Under Different Error Metrics",
   pages = "135--140",
   booktitle = "17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems",
   year = 2014,
   location = "Warsaw, PL",
   publisher = "IEEE Computer Society",
   ISBN = "978-1-4799-4558-0",
   doi = "10.1109/DDECS.2014.6868777",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/10513"
}
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