Prof. Ing. Lukáš Sekanina, Ph.D.
| Sekanina, L., Stareček, L., Kotásek, Z.: Novel Logic Circuits Controlled by Vdd, In: Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, Praha, CZ, IEEE CS, 2006, p. 85-86, ISBN 1424401844 | | Publication language: | english |
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| Original title: | Novel Logic Circuits Controlled by Vdd |
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| Title (cs): | Nové logické obvody řizené napájecím napětím |
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| Pages: | 85-86 |
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| Proceedings: | Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop |
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| Conference: | IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop |
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| Place: | Praha, CZ |
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| Year: | 2006 |
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| ISBN: | 1424401844 |
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| Publisher: | IEEE Computer Society |
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| Keywords |
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| polymorphic gate, logic circuit, evolutionary design |
| Annotation |
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Polymorphic gates exhibit one or more additional functions in addition to the main function of the gate. The additional functions can be activated under certain conditions by changing control parameters (such as temperature, Vdd, light etc.) of the circuit. This paper shows a non-trivial polymorphic combinational circuit (5 bit majority/Boolean symmetry) which was designed at the gate level and then simulated using polymorphic NAND/NOR gates controlled by Vdd and some conventional gates at the transistor level. PSpice simulations have shown correct behavior of this circuit.
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| BibTeX: |
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@INPROCEEDINGS{
author = {Lukáš Sekanina and Lukáš Stareček and Zdeněk Kotásek},
title = {Novel Logic Circuits Controlled by Vdd},
pages = {85--86},
booktitle = {Proc. of 2006 IEEE Design and Diagnostics of Electronic
Circuits and Systems Workshop},
year = {2006},
location = {Praha, CZ},
publisher = {IEEE Computer Society},
ISBN = {1424401844},
language = {english},
url = {http://www.fit.vutbr.cz/research/view_pub.php?id=8033}
} |
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Faculty of Information Technology
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