Publication Details

Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability

PEČENKA Tomáš, SEKANINA Lukáš and KOTÁSEK Zdeněk. Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability. ACM Transactions on Design Automation of Electronic Systems, vol. 13, no. 3, 2008, pp. 1-21. ISSN 1084-4309.
Czech title
Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability
Type
journal article
Language
english
Authors
Keywords

evolutionary algorithm, digital circuit, testability analysis

Abstract

This article presents a new real-world application of evolutionary computing in the area of digital-circuits testing. A method is described which enables to evolve large synthetic RTL benchmark circuits with a predefined structure and testability. Using the proposed method, a new collection of synthetic benchmark circuits was developed. These benchmark circuits will be useful in a validation process of novel algorithms and tools in the area of digital-circuits testing. Evolved benchmark circuits currently represent the most complex benchmark circuits with a known level of testability. Furthermore, these circuits are the largest that have ever been designed by means of evolutionary algorithms. This work also investigates suitable parameters of the evolutionary algorithm for this problem and explores the limits in the complexity of evolved circuits.

Published
2008
Pages
1-21
Journal
ACM Transactions on Design Automation of Electronic Systems, vol. 13, no. 3, ISSN 1084-4309
Publisher
Association for Computing Machinery
BibTeX
@ARTICLE{FITPUB8653,
   author = "Tom\'{a}\v{s} Pe\v{c}enka and Luk\'{a}\v{s} Sekanina and Zden\v{e}k Kot\'{a}sek",
   title = "Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability",
   pages = "1--21",
   journal = "ACM Transactions on Design Automation of Electronic Systems",
   volume = 13,
   number = 3,
   year = 2008,
   ISSN = "1084-4309",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/8653"
}
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