Ing. Aleš Smrčka, Ph.D.

Education:

2010 - Ph.D. in Computer Science and Engineering (thesis: Verification of Asynchronous and Parametrized Hardware Designs), FIT, BUT
2003 - M.Sc. in Electrical Engineering and Computer Science, FIT, BUT

Professional career:

• since 2011: assistant professor at FIT BUT
• 2006-2010: assistant lecturer at FIT BUT

Research interests:

• Formal analysis and verification
• Software testing
• Modelling, simulation, and verification of hardware designs

Software:

• CDCreloaded - A framework for formal verification of clock-domain-crossing.
• fast2armc - FAST to ARMC translator
• vhd2ca - VHDL translator to counter automata
• for other projects cf. my personal wiki

Other interests:

• programming in C/C++, Python
• photography, fantasy, sci-fi