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Ing. Aleš Smrčka
Publications
| 2008 | Smrčka Aleš, Vojnar Tomáš: Verifying Parametrised Hardware Designs Via Counter Automata, In: Lecture Notes in Computer Science, Vol. 2008, No. 4899, DE, |
| 2007 | Smrčka Aleš, Řehák Vojtěch, Vojnar Tomáš, Šafránek David, Matoušek Petr, Řehák Zdeněk: Verifying VHDL Design with Multiple Clocks in SMV, In: Lecture Notes in Computer Science, Vol. 2007, No. 4346, DE, |
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