Ing. Aleš Smrčka, Ph.D.

2010Smrčka Aleš, Vojnar Tomáš: Verification of Asynchronous and Parametrized Hardware Designs, Brno, CZ, FIT VUT, 2010, s. 115, ISBN 978-80-214-4214-6
 Smrčka Aleš: Verification of Asynchronous and Parametrized Hardware Designs, Brno, CZ, UITS FIT VUT, 2010, s. 124
 Smrčka Aleš: Verification of Asynchronous and Parametrized Hardware Designs, In: Information Sciences and Technologies Bulletin of the ACM Slovakia, roč. 2, č. 2, 2010, Bratislava, SK, s. 60-69, ISSN 1338-1237
2008Smrčka Aleš, Vojnar Tomáš: Verifying Parametrised Hardware Designs Via Counter Automata, In: Hardware and Software, Verification and Testing, Heidelberg, DE, Springer, 2008, s. 51-68, ISSN 0302-9743
2007Smrčka Aleš, Řehák Vojtěch, Vojnar Tomáš, Šafránek David, Matoušek Petr, Řehák Zdeněk: Verifying VHDL Design with Multiple Clocks in SMV, In: Formal Methods: Applications and Technology, Bonn, DE, Springer, 2007, s. 148-164, ISSN 0302-9743
2006Hlávka Petr, Řehák Vojtěch, Smrčka Aleš, Šafránek David, Šimeček Pavel, Vojnar Tomáš: Formal Verification of the CRC Algorithm Properties, In: MEMICS 2006 Second Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Mikulov, CZ, 2006, s. 55-62, ISBN 80-214-3287-X
 Smrčka Aleš, Řehák Vojtěch, Vojnar Tomáš, Šafránek David, Matoušek Petr, Řehák Zdeněk: Verifying VHDL Design with Multiple Clocks in SMV, In: Proceedings of FMICS 2006, Bonn, DE, 2006, s. 140-155
 Smrčka Aleš: High-level Modeling, Analysis and Verification of Programmable Hardware Design, Proceedings of the Junior Scientist Conference 2006, Vienna, AT, TUV, 2006, s. 93-94, ISBN 3-902463-05-8
2005Matoušek Petr, Smrčka Aleš, Vojnar Tomáš: High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design, In: Correct Hardware Design and Verification Methods, Berlin, DE, Springer, 2005, s. 371-375, ISBN 978-3-540-29105-3, ISSN 0302-9743
 Matoušek Petr, Smrčka Aleš, Vojnar Tomáš: High-level Modelling, Analysis, and Verification on FPGA-based Hardware Design, Brno, CZ, CESNET, 2005, s. 17
 Smrčka Aleš: Abstract Model Verification of the Lookup Processor, In: Proceedings of MOSIS'05, Ostrava, CZ, MARQ, 2005, s. 138-145, ISBN 80-86840-10-7
 Smrčka Aleš: Towards Hardware Verification, In: Proceedings of the 11th Conference Student EEICT 2005, Brno, CZ, FIT VUT, 2005, s. 668-672, ISBN 978-80-214-2890-4

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