Publications
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2023
FIEDOR Jan, KŘENA Bohuslav, SMRČKA Aleš, VAŠÍČEK Ondřej and VOJNAR Tomáš. Integrating OSLC Services into Eclipse. In: Computer Aided Systems Theory - EUROCAST 2022. Lecture Notes in Computer Science, vol. 13789. Las Palmas de Gran Canaria: Springer International Publishing, 2023, pp. 240-249. ISBN 978-3-031-25311-9.
DetailROZSÍVAL Michal and SMRČKA Aleš. NetLoiter: A Tool for Automated Testing of Network Applications using Fault-injection. In: Proceedings - 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops Volume, DSN-W 2023. Porto: Institute of Electrical and Electronics Engineers, 2023, pp. 207-210. ISBN 979-8-3503-2543-0.
DetailFIEDOR Tomáš, HRUŠKA Martin and SMRČKA Aleš. Orchestrating Digital Twins for Distributed Manufacturing Execution Systems. In: Computer Aided Systems Theory - EUROCAST 2022. Lecture Notes in Computer Science, vol. 13789. Zurich: Springer International Publishing, 2023, pp. 223-231. ISBN 978-3-031-25311-9.
DetailSMRČKA Aleš, SANGCHOOLIE Behrooz, EMANUELE Mingozzi, VARA Luis De La Jose, FARRELL Marie, BARBOSA Raul, BAGLUM Cem, YAYAN Ugur, ERGUN Salih and KANAK Alper. Towards an extensive set of criteria for safety and cyber-security evaluation of cyber-physical systems [version 1; peer review: awaiting peer review]. Open Research Europe, vol. 3, no. 219, 2023, pp. 1-21. ISSN 2732-5121.
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2022
BAUER Thomas, AGIRRE Andoni Joseba, FÜRCHO David, HERZNER Wolfgang, HRUŠKA Bob, KARACA Mustafa, PEREIRA David M., PROENÇA José, SCHLICK Rupert, SICHER Robert, SMRČKA Aleš, YAYAN Ugur and SANGCHOOLIE Behrooz. Cross-domain Modelling of Verification and Validation Workflows in the Large Scale European Research Project VALU3S Invited Paper. In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Lecture Notes in Computer Science. Cham, 2022, pp. 368-382.
DetailVAŠÍČEK Ondřej, FIEDOR Jan, KRATOCHVÍLA Tomáš, KŘENA Bohuslav, SMRČKA Aleš and VOJNAR Tomáš. Unite: An Adapter for Transforming Analysis Tools to Web Services via OSLC. In: ESEC/FSE 2022: Proceedings of the 30th ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering. Singapore: Association for Computing Machinery, 2022, pp. 1408-1418. ISBN 978-1-4503-9413-0.
DetailCHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Utilizing parametric systems for detection of pipeline hazards. International Journal on Software Tools for Technology Transfer, vol. 2020, no. 1, 2022, pp. 1-28. ISSN 1433-2779.
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2021
BARBOSA Raul, ESNAOLA Mikel L., GIANTAMIDIS Georgios, PEREIRA David M., SANGCHOOLIE Behrooz, SCHLICK Rupert, SMRČKA Aleš and YAZICI Ahmed et al. The VALU3S ECSEL project: Verification and validation of automated systems safety and security. Microprocessors and Microsystems, vol. 87, no. 104349, 2021, pp. 1-18. ISSN 0141-9331.
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2020
BARBOSA Raul, BECKER Hauke, ESNAOLA Mikel L., FERRARI Enrico, FOLKESSON Peter, GIANTAMIDIS Georgios, KANAK Alper, PEREIRA David M., POMANTE Luigi, SANGCHOOLIE Behrooz, SCHLICK Rupert, SMRČKA Aleš and YAZICI Ahmed. The VALU3S ECSEL Project: Verification and Validation of Automated Systems Safety and Security. In: 2020 23rd Euromicro Conference on Digital System Design (DSD 2020). Krajn: Institute of Electrical and Electronics Engineers, 2020, pp. 352-359. ISBN 978-1-7281-9535-3.
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2018
FIEDOR Jan, MUŽIKOVSKÁ Monika, SMRČKA Aleš, VAŠÍČEK Ondřej and VOJNAR Tomáš. Advances in the ANaConDA Framework for Dynamic Analysis and Testing of Concurrent C/C++ Programs. In: Proceedings of 27th ACM SIGSOFT International Symposium on Software Testing and Analysis. New York: Association for Computing Machinery, 2018, pp. 356-359. ISBN 978-1-4503-5699-2.
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2017
DIAS Ricardo J., FERREIRA Carla, FIEDOR Jan, LOURENCO Joao, SMRČKA Aleš, SOUSA Diogo J. and VOJNAR Tomáš. Verifying Concurrent Programs Using Contracts. In: 2017 IEEE International Conference on Software Testing, Verification and Validation (ICST). Tokyo: Institute of Electrical and Electronics Engineers, 2017, pp. 196-206. ISBN 978-1-5090-6032-0.
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2016
CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Hades: Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems. In: Proceedings 11th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS 2016). Electronic Proceedings in Theoretical Computer Science, vol. 2016. Brno: Faculty of Informatics MU, 2016, pp. 87-93. ISBN 978-80-210-8362-2. ISSN 2075-2180.
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2015
CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems. In: Proceedings of the 15th International Conference on Computer Aided Systems Theory (EUROCAST 2015). Las Palmas de Grand Canaria: The Universidad de Las Palmas de Gran Canaria, 2015, pp. 193-194. ISBN 978-84-606-5438-4.
DetailCHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems. In: Computer Aided Systems Theory - EUROCAST 2015. Lecture Notes in Computer Science, vol. 9520. Zurich: Springer International Publishing, 2015, pp. 605-614. ISBN 978-3-319-27340-2. ISSN 0302-9743.
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2014
CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors. In: Proceedings of 15th International Workshop on Microprocessor Test and Verification (MTV 2014). Austin, TX: IEEE Computer Society, 2014, pp. 83-89. ISBN 978-1-4673-6858-2.
DetailCHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors. Brno: Faculty of Information Technology BUT, 2014.
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2013
CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. An Abstraction of Multi-Port Memories with Arbitrary Addressable Units. In: Proceedings of the 14th Computer Aided Systems Theory. Las Palmas de Grand Canaria: The Universidad de Las Palmas de Gran Canaria, 2013, pp. 254-255. ISBN 978-84-695-6971-9.
DetailCHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. An Abstraction of Multi-Port Memories with Arbitrary Addressable Units. In: Computer Aided Systems Theory - EUROCAST 2013. Lecture Notes in Computer Science, vol. 8111. Berlin Heidelberg: Springer Verlag, 2013, pp. 460-468. ISBN 978-3-642-53855-1.
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2012
CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Automatic Formal Correspondence Checking of ISA and RTL Microprocessor Description. In: Proceedings of the 13th International Workshop on Microprocessor Test and Verification (MTV 2012). Austin, TX: Institute of Electrical and Electronics Engineers, 2012, pp. 6-12. ISBN 978-1-4673-4441-8.
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2010
SMRČKA Aleš and VOJNAR Tomáš. Verification of Asynchronous and Parametrized Hardware Designs. FIT Monograph. Brno: Faculty of Information Technology BUT, 2010. ISBN 978-80-214-4214-6.
DetailSMRČKA Aleš. Verification of Asynchronous and Parametrized Hardware Designs. Information Sciences and Technologies Bulletin of the ACM Slovakia, vol. 2, no. 2, 2010, pp. 60-69. ISSN 1338-1237.
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2008
SMRČKA Aleš and VOJNAR Tomáš. Verifying Parametrised Hardware Designs Via Counter Automata. In: Hardware and Software, Verification and Testing. Lecture Notes in Computer Science, vol. 4899. Heidelberg: Springer Verlag, 2008, pp. 51-68. ISSN 0302-9743.
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2007
SMRČKA Aleš, ŘEHÁK Vojtěch, VOJNAR Tomáš, ŠAFRÁNEK David, MATOUŠEK Petr and ŘEHÁK Zdeněk. Verifying VHDL Design with Multiple Clocks in SMV. In: Formal Methods: Applications and Technology. Lecture Notes in Computer Science, vol. 4346. Bonn: Springer Verlag, 2007, pp. 148-164. ISSN 0302-9743.
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2006
HLÁVKA Petr, ŘEHÁK Vojtěch, SMRČKA Aleš, ŠAFRÁNEK David, ŠIMEČEK Pavel and VOJNAR Tomáš. Formal Verification of the CRC Algorithm Properties. In: MEMICS 2006 Second Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Mikulov, 2006, pp. 55-62. ISBN 80-214-3287-X.
DetailSMRČKA Aleš. High-level Modeling, Analysis and Verification of Programmable Hardware Design. Proceedings of the Junior Scientist Conference 2006. Vienna: Technical University Wien, 2006. ISBN 3-902463-05-8.
DetailSMRČKA Aleš, ŘEHÁK Vojtěch, VOJNAR Tomáš, ŠAFRÁNEK David, MATOUŠEK Petr and ŘEHÁK Zdeněk. Verifying VHDL Design with Multiple Clocks in SMV. In: Proceedings of FMICS 2006. Bonn, 2006, pp. 140-155.
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2005
SMRČKA Aleš. Abstract Model Verification of the Lookup Processor. In: Proceedings of MOSIS'05. Ostrava, 2005, pp. 138-145. ISBN 80-86840-10-7.
DetailMATOUŠEK Petr, SMRČKA Aleš and VOJNAR Tomáš. High-level Modelling, Analysis and Verification on FPGA-based Hardware Design. Brno: CESNET National Research and Education Network, 2005.
DetailMATOUŠEK Petr, SMRČKA Aleš and VOJNAR Tomáš. High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design. In: Correct Hardware Design and Verification Methods. Lecture Notes in Computer Science 3725/2005, vol. 2005. Berlin: Springer Verlag, 2005, pp. 371-375. ISBN 978-3-540-29105-3. ISSN 0302-9743.
DetailSMRČKA Aleš. Towards Hardware Verification. In: Proceedings of the 11th Conference Student EEICT 2005. Volume 3. Brno: Faculty of Information Technology BUT, 2005, pp. 668-672. ISBN 978-80-214-2890-4.
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2003
SMRČKA Aleš. Universal disassembler. In: Proceedings of the International Conference and Competition - Student EEICT 2003. Brno: Faculty of Electrical Engineering and Communication BUT, 2003, pp. 346-348. ISBN 80-214-2401-X.
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