Ing. Martin Straka

2013Szurman, K., Kaštil, J., Straka, M., Kotásek, Z.: Fault Tolerant CAN Bus Control System Implemented into FPGA, In: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2013, Karlovy Vary, CZ, IEEE CS, 2013, p. 289-292, ISBN 978-1-4673-1185-4
2012Kaštil, J., Straka, M., Kotásek, Z.: Methodology for Increasing Reliability of FPGA Design via Partial Reconfiguration, In: The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12), Annecy, FR, Polimi, 2012, p. 1-4
 Kaštil, J., Straka, M., Mičulka, L., Kotásek, Z.: Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA, In: 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, Cesme-Izmir, TR, IEEE CS, 2012, p. 250-257, ISBN 978-0-7695-4798-5
 Straka, M., Kaštil, J., Kotásek, Z., Mičulka, L.: Fault Tolerant System Design and SEU Injection based Testing, In: Microprocessors and Microsystems, Vol. 2013, No. 37, 2012, Amsterdam, NL, p. 155-173, ISSN 0141-9331
 Straka, M., Kaštil, J., Kotásek, Z.: FPGA-based Fault Tolerant Architectures and Their Dependability Analysis, In: MEMICS'12 -- 8th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, FI MUNI, 2012, p. 1-1
 Straka, M., Kaštil, J., Kotásek, Z.: Methodology for Reliability Analysis of FPGA-based Fault Tolerant Systems, In: CSE'2012 International Scientific Conference on Computer Science and Engineering, Košice, SK, TU v Košiciach, 2012, p. 146-153, ISBN 978-80-8143-049-7
 Straka, M., Mičulka, L., Kaštil, J., Kotásek, Z.: Test Platform for Fault Tolerant Systems Design Qualities Verification, In: 15th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Tallin, EE, IEEE CS, 2012, p. 336-341, ISBN 978-1-4673-1185-4
2011Straka, M., Kaštil, J., Kotásek, Z.: SEU Simulation Framework for Xilinx FPGA: First Step Towards Testing Fault Tolerant Systems, In: 14th EUROMICRO Conference on Digital System Design, Oulu, FI, IEEE CS, 2011, p. 223-230, ISBN 978-0-7695-4494-6
 Straka, M., Kaštil, J., Novotný, J., Kotásek, Z.: Advanced Fault Tolerant Bus for Multicore System Implemented in FPGA, In: IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011, Cottbus, DE, IEEE CS, 2011, p. 397-398, ISBN 978-1-4244-9753-9
2010Straka, M., Kaštil, J., Kotásek, Z.: Fault Tolerant Structure for SRAM-based FPGA via Partial Dynamic Reconfiguration, In: 13th EUROMICRO Conference on Digital System Design, DSD'2010, Lille, FR, IEEE CS, 2010, p. 365-372, ISBN 978-0-7695-4171-6
 Straka, M., Kaštil, J., Kotásek, Z.: Generic Partial Dynamic Reconfiguration Controller for Fault Tolerant Designs Based on FPGA, In: NORCHIP 2010, Tampere, FI, IEEE CS, 2010, p. 1-4, ISBN 978-1-4244-8971-8
 Straka, M., Kaštil, J., Kotásek, Z.: Methodology for Design of Highly Dependable Systems in FPGA, In: International Scientific Conference on Computer Science and Engineering, Košice, SK, TU v Košiciach, 2010, p. 186-193, ISBN 978-80-8086-164-3
 Straka, M., Kaštil, J., Kotásek, Z.: Modern Fault Tolerant Architectures Based on Partial Dynamic Reconfiguration in FPGAs, In: Proceedings of the 2010 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems DDECS 2010, Wien, AT, IEEE CS, 2010, p. 173-176, ISBN 978-1-4244-6610-8
 Straka, M.: Metodika pro návrh číslicových systémů se zvýšenou spolehlivostí v obvodech FPGA, In: Počítačové architektury a diagnostika 2010, Brno, CZ, FIT VUT, 2010, p. 159-164, ISBN 978-80-214-4140-8
2009Kotásek, Z., Straka, M.: The Design of On-line Checkers and Their Use in Verification and Testing, In: Acta Electrotechnica et Informatica, Vol. 2009, No. 3, SK, p. 8-15, ISSN 1335-8243
 Straka, M., Kotásek, Z.: High Availability Fault Tolerant Architectures Implemented into FPGAs, In: 12th EUROMICRO Conference on Digital System Design DSD 2009, Patras, GR, IEEE CS, 2009, p. 108-116, ISBN 978-0-7695-3782-5
 Straka, M., Kotásek, Z.: Reliability Models for Fault Tolerant Architectures Based on FPGA, In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, FI MUNI, 2009, p. 239-239, ISBN 978-80-87342-04-6
 Straka, M.: Metodologie návrhu obvodů se zvýšenou spolehlivostí založených na FPGA, In: Počítačové architektury a diagnostika 2009, Zlin, CZ, UTB ve Zlíně, 2009, p. 141-146, ISBN 978-80-7318-847-4
2008Straka, M., Kotásek, Z., Winter, J.: Digital Systems Architectures Based on On-line Checkers, In: 11th EUROMICRO Conference on Digital System Design DSD 2008, Parma, IT, IEEE CS, 2008, p. 81-87, ISBN 978-0-7695-3277-6
 Straka, M., Kotásek, Z., Winter, J.: The Design of Hardware Checkers for Verification and Diagnostic Purposes, In: CSE'2008 International Scientific Conference on Computer Science and Engineering, High Tatras - Stará Lesná, SK, TU v Košiciach, 2008, p. 320-327, ISBN 978-80-8086-092-9
 Straka, M., Kotásek, Z.: Design of FPGA-Based Dependable Systems, In: 4th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Znojmo, CZ, MUNI, 2008, p. 240-247, ISBN 978-80-7355-082-0
 Straka, M.: Aplikace hlídacích obvodů v architekturách odolných proti poruchám, In: Počítačové architektury a diagnostika 2008, Liberec, CZ, TUL, 2008, p. 97-102, ISBN 978-80-7372-378-1
 Straka, M.: Checkers Design for Communication Protocols Based on FPGAs, In: Proceedings of the 14th Conference STUDENT EEICT 2008 Volume 4, Brno, CZ, FIT VUT, 2008, p. 467-473, ISBN 978-80-214-3617-6
2007Straka, M., Kotásek, Z.: Checker for Communication Protocol between IP Cores Based on FPGA, In: 3rd Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Znojmo, CZ, FI MUNI, 2007, p. 193-200, ISBN 978-80-7355-077-6
 Straka, M., Tobola, J., Kotásek, Z.: Checker Design for On-line Testing of Xilinx FPGA Communication, In: The 22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Rome, IT, IEEE CS, 2007, p. 152-160, ISBN 0-7695-2885-6
 Straka, M.: Generátor hlídacích obvodů pro komunikační protokoly Xilinx FPGA, In: Počítačové architektury a diagnostika 2007, Plzeň, CZ, ZČU v Plzni, 2007, p. 129-136, ISBN 978-80-7043-605-9
 Straka, M.: VHDL Design of Educational, Modern and Open-Architecture CPU, In: Proceedings of the 13th Conference STUDENT EEICT 2007 Volume 4, Brno, CZ, VUT v Brně, 2007, p. 457-461, ISBN 978-80-214-3410-3
 Tobola, J., Kotásek, Z., Kořenek, J., Martínek, T., Straka, M.: Online Protocol Testing for FPGA Based Fault Tolerant Systems, In: 10th EUROMICRO Conference on Digital System Design DSD 2007, Lubeck, Germany, DE, IEEE CS, 2007, p. 676-679, ISBN 0-7695-2978-X

Show all publications

Your IPv4 address: 107.21.186.38
Switch to IPv6 connection

DNSSEC [dnssec]