Ing. Josef Strnadel, Ph.D.

Education:

• master degree in Computer Science and Engineering, FEECS BUT in Brno, 2000
• PhD. in Information Technology, FIT BUT in Brno, 2004

Professional career:

• 2000-2001 PhD student at FEECS BUT in Brno
• 2002-2004 PhD student at FIT BUT in Brno
• since 2004 employee at FIT BUT in Brno

Awards:

• 2004: Jan Hlavička Award for Best Paper Presented at PAD
• 2002: Siemens Award Support for Postgraduate Students

Research interests:

• Digital circuit design
• Digital circuit diagnosis, digital circuit testability analysis at register-transfer level: for diagnostics-related products go here
• Embedded systems
• Real-time (operating) systems

Memberships:

 -

Other interests:

• (Bike)tourism, canoeing, air-riffle sport shooting
• Reading, radio
• Language studying - English (active conversational level), French (got to lower quality level), Latin (passive level)
• Guinea-pig breeding, bonsai growing
• Fine arts - painting, sculpture, design, computer graphics, artificial 3D scenes and animations creation and rendering
• C/C++, Java(Script), VHDL, (La)TEX, Linux/Unix, Web-design
• Amiga computers - history, portal 1, portal 2, Aminet, official pages

My favorite links:

• Freescale Race Challenge (2011, 2010, 2009)
• The On-Line Encyclopedia of Integer Sequences
• MathWorld
• AT&T Labs-Research