Educational and research tools
for digital circuit diagnosis


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SET
Cirgen
CADeT
TASTE

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copyright © 2008
Josef Strnadel
strnadel@fit.vutbr.cz

CADeT: Combined Automated Design for testability Tool

Research related to CADeT has been supported by the project Optimizing Methods in Digital Systems Diagnosis, (Optimalizační postupy v diagnostice číslicových systémů, GP102/05/P193) of the Grant Agency of the Czech Republic (GAČR)
In order to achieve a high-quality cost/quality trade-off between design constraints and diagnostic parameters, the tool will perform automated design-for-testability (DFT) process utilizing feasible combination of several DFT techniques.


  • Latest WIN32-version of SET can be downloaded here (338KB ZIP-archive).