Doc. Ing. Zdeněk Vašíček, Ph.D.

VAŠÍČEK Zdeněk and SEKANINA Lukáš. An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs. In: Proc. of 2007 International Conference on Field Programmable Logic and Applications. Los Alamitos: IEEE Computer Society, 2007, pp. 216-221. ISBN 1424410606.
Publication language:english
Original title:An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs
Title (cs):Cenově výhodná alternativa k adaptivnímu mediánovému filtru pro FPGA
Pages:216-221
Proceedings:Proc. of 2007 International Conference on Field Programmable Logic and Applications
Conference:The International Conference on Field Programmable Logic and Applications
Place:Los Alamitos, US
Year:2007
ISBN:1424410606
Publisher:IEEE Computer Society
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Keywords
image filter, FPGA, evolutionary design
Annotation
This paper presents a new approach to the FPGA implementation of image filters which are utilized to remove the salt-and-pepper noise of high intensity (up to 70% of corrupted pixels). The proposed solution combines image filters designed by means of evolutionary algorithm with a simple human-designed preprocessing and post-processing unit. It provides the same filtering capability as a standard adaptive median filter; however, using four times less Virtex slices.

BibTeX:
@INPROCEEDINGS{
   author = {Zden{\v{e}}k Va{\v{s}}{\'{i}}{\v{c}}ek and Luk{\'{a}}{\v{s}}
	Sekanina},
   title = {An Area-Efficient Alternative to Adaptive Median Filtering
	in FPGAs},
   pages = {216--221},
   booktitle = {Proc. of 2007 International Conference on Field Programmable
	Logic and Applications},
   year = {2007},
   location = {Los Alamitos, US},
   publisher = {IEEE Computer Society},
   ISBN = {1424410606},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php.en.iso-8859-2?id=8398}
}

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