Prof. Ing. Tomáš Vojnar, Ph.D.
HADES (Hazard Detection System)
|Authors:||Charvát Lukáš, Smrčka Aleš, Vojnar Tomáš|
|Licence:||required - no fee|
|Keywords:||Microprocessor verification, hazard, RAW, WAW, control hazard, static analysis, formal verification|
|Hades is a verification tool, currently aimed at detection of RAW hazards in single pipelined microprocessors. It combines several approaches including data-flow analysis of possible hazards, and dynamic analysis using parameterized systems. As its input, the tool expects a processor described in the form of processor structure graph PSG using VAM file format.|
|Free software under the terms of the GNU GPL v3 license.|