Conference paper

STRNADEL Josef. Statistical Model Checking of Processor Systems in Various Interrupt Scenarios. In: Proceedings of 8th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA). Cham: Springer International Publishing, 2018, pp. 414-429. ISSN 0302-9743. Available from: https://link.springer.com/chapter/10.1007%2F978-3-030-03421-4_26
Publication language:english
Original title:Statistical Model Checking of Processor Systems in Various Interrupt Scenarios
Title (cs):Statistické ověřování modelů procesorových systémů v různých přerušovacích scénářích
Pages:414-429
Proceedings:Proceedings of 8th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA)
Conference:8th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation
Series:Lecture Notes in Computer Science, Vol. 11245
Place:Cham, CH
Year:2018
URL:https://link.springer.com/chapter/10.1007%2F978-3-030-03421-4_26
Journal:Lecture Notes in Computer Science, No. 10, DE
ISSN:0302-9743
DOI:10.1007/978-3-030-03421-4_26
Publisher:Springer International Publishing
Keywords
cpu, systém, interrupt, arrival, servicing, execution, priority, jiter, nesting, masking, late arrival, tail chaining, modeling, stochastic timed automaton, predictability analysis, statistical model checking
Annotation
Many practical, especially real-time, systems are expected to be predictable under various sources of unpredictability. To cope with the expectation, a system must be modeled and analyzed precisely for various operating conditions. This represents a problem that  grows with the dynamics of the system and that must be, typically, solved before the system starts to operate.  Due to the general complexity of the problem, this paper focuses just to processor based systems with interruptible executions. Their predictability analysis becomes more difficult especially when interrupts may occur at arbitrary times, suffer from arrival and servicing jitters, are subject to priorities, or may be nested and un/masked at run-time. Such a behavior of interrupts and executions has stochastic aspects and leads to the explosion of the number of situations to be considered.  To cope with such a behavior, we propose a simulation model that relies on a network of stochastic timed automata and involves the above-mentioned behavioral aspects related to  interrupts and executions. For a system, modeled by means of the automata, we show that the problem of analyzing its predictability may be efficiently solved by means of the statistical model checking.
BibTeX:
@INPROCEEDINGS{
   author = {Josef Strnadel},
   title = {Statistical Model Checking of Processor Systems in
	Various Interrupt Scenarios},
   pages = {414--429},
   booktitle = {Proceedings of 8th International Symposium On Leveraging
	Applications of Formal Methods, Verification and Validation
	(ISoLA)},
   series = {Lecture Notes in Computer Science, Vol. 11245},
   journal = {Lecture Notes in Computer Science},
   number = {10},
   year = {2018},
   location = {Cham, CH},
   publisher = {Springer International Publishing},
   ISSN = {0302-9743},
   doi = {10.1007/978-3-030-03421-4_26},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php.en.iso-8859-2?id=11680}
}

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