Title:

# Digital Systems Design

Code:INC
Ac.Year:2019/2020
Sem:Summer
Curriculums:
ProgrammeField/
Specialization
YearDuty
BIT-1stCompulsory
IT-BC-3BIT1stCompulsory
Language of Instruction:Czech
Credits:5
Completion:credit+exam (written)
Type of
instruction:
Hour/semLecturesSeminar
Exercises
Laboratory
Exercises
Computer
Exercises
Other
Hours:3910003
ExamsTestsExercisesLaboratoriesOther
Points:55250020
Guarantor:Fučík Otto, doc. Dr. Ing. (DCSY)
Deputy guarantor:Martínek Tomáš, Ing., Ph.D. (DCSY)
Lecturer:Fučík Otto, doc. Dr. Ing. (DCSY)
Kořenek Jan, doc. Ing., Ph.D. (DCSY)
Martínek Tomáš, Ing., Ph.D. (DCSY)
Instructor:Kořenek Jan, doc. Ing., Ph.D. (DCSY)
Martínek Tomáš, Ing., Ph.D. (DCSY)
Faculty:Faculty of Information Technology BUT
Department:Department of Computer Systems FIT BUT
Prerequisites:
 Discrete Mathematics (IDA), DMAT
Follow-ups:
 Design of Computer Systems (INP), DCSY Microprocessors and Embedded Systems (IMP), DCSY Personal Computers (ITP), DCSY
Substitute for:
 Logic Systems (LOS), DCSY
Schedule:
DayLessonWeekRoomStartEndLect.Gr.Groups
ThulecturelecturesD105 10:0012:501BIA 2BIA 2BIB xx
ThuexerciselecturesD105 13:0013:501BIA 2BIA 2BIB xx 10 - 29
ThulecturelecturesD105 14:0016:501BIB 2BIA 2BIB xx
ThuexerciselecturesD105 17:0017:501BIB 2BIA 2BIB xx 30 - 44

Learning objectives:
The goal is to obtain fundamental knowledge of methods for description, analysis, and design of combinatorial and sequential logic networks in digital systems.
Description:
Binary number system: positional notation, conversion of the base, binary codes, binary arithmetic. Boolean algebra, logic functions and their representations: logic expressions, reduction methods, the design of combinatorial logic networks. Analysis of logic networks behaviour: signal races, hazards. Selected logic modules: adder, subtractor, multiplexer, demultiplexer, decoder, coder, comparator, arithmetic and logic unit. Simple asynchronous networks: design and analysis of behaviour. Sequential logic networks, latches and flip-flops. State machines and their representations. Design of synchronized sequential networks: state coding, optimization and implementation. Register, counter, shift register, impulse divider. Design of simple digital equipment: design CAD tools, description tools, design strategy. Integrated circuits families. Programmable logic devices.
Knowledge and skills required for the course:
The sets, relations and mappings. Basic terms and axioms of Boolean algebra. The elementary notions of the graph theory. Rudiments of electrical engineering phenomena and basic active and passive electronic elements.
Learning outcomes and competencies:
Fundamental knowledge of selected methods for description, analysis and design of combinatorial and sequential logic in digital systems.
Why is the course taught:
Digital systems are the basis for computer architecture design. This course teaches the basic concepts of digital design as well as tools for the design of digital circuits and provides procedures suitable for a variety of digital systems.
Syllabus of lectures:

• Binary number system: positional notation, conversion of the base, binary codes, binary arithmetic.
• Boolean algebra, logic functions and their representations, logic expressions.
• Reduction methods: Karnaugh maps, Quine-McCluskey tabular method, Petrick's cover function.
• Logic and functional diagrams. Analysis of logic networks behaviour: signal races, hazards.
• Combinational logic: multiplexer, demultiplexer, decoder, coder.
• Combinational logic: comparator, adder, subtractor, arithmetic and logic unit.
• State machines and their representations. Latches and flip-flops.
• Synchronized sequential networks: state coding, optimization and implementation.
• Sequential logic: Registers, counters, shift registers, frequency dividers.
• VHDL language, logic circuits synthesis.
• Design of simple digital circuits: CAD tools, design methodology, FITkit.
• Programmable logic devices.
• Integrated circuits families.
Syllabus of numerical exercises:

• Binary number system: positional notation, conversion of the base, binary codes, binary arithmetic.
• Boolean algebra, logic functions and their representations, a behaviour analysis of contact-switch networks.
• Logic expressions. Quine-McCluskey tabular reduction method, Petrick's cover function.
• Reduction methods: Karnaugh maps, logic and functional diagrams.
• Logic functions implementation using logic components.
• Selected logic modules: multiplexer, demultiplexer, encoder, decoder, adder, ALU.
• State machines and their representations. Design of synchronized sequential networks.
• Design of logic networks using programmable logic devices.
Syllabus of computer exercises:

• Introduction to a CAD software. Modelling of demo examples.
• Modelling of personally designed logic networks.
Syllabus - others, projects and individual work of students:

• Three-hour project.
Fundamental literature:

• Harris, D., Harris, S.: Digital Design and Computer Architecture 2nd Edition, Morgan Kaufmann, eBook ISBN: 9780123978165, paperback ISBN: 9780123944245, 2012.
• Wakerly, J. F.: Digital Design: Principles and Practices (4th Edition, Book only) 4th Edition, PEARSON, ISBN: 9788131713662, 8131713660, Edition: 4th Edition, 2008.
• Mano, M. M. R, Ciletti, D.: Digital Design (4th Edition), Prentice-Hall, ISBN:0131989243, 2006.
Study literature:

Controlled instruction:
The knowledge of students is examined by the mid-exam (25 points), the project (20 points) and by the final exam. The minimal number of points, which can be obtained from the final exam, is 25 (of 55 points). Otherwise, no points will be assigned to a student. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action can be initiated.
Progress assessment:
Standard students in Czech Programme:
1) Mid-term exam: 25 points.
2) Homework and its evaluation in PC laboratory: 20 points.
3) Final exam: 55 points.
The passing boundary for ECTS assessment: 50 points.

International students:
1) Test: 20 points.
2) Mid-term exam: 20 points.
3) Final exam: 60 points.
The passing boundary for ECTS assessment: 50 points.
Exam prerequisites:
For receiving the credit and thus for entering the exam, students have to obtain at least five points from the project. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action may be initiated.