Title:

Computation Systems Architectures

Code:AVS
Ac.Year:2019/2020
Sem:Winter
Curriculums:
ProgrammeField/
Specialization
YearDuty
IT-MSC-2MBI-Elective
IT-MSC-2MBS-Compulsory-Elective - group C
IT-MSC-2MGM2ndElective
IT-MSC-2MIN-Elective
IT-MSC-2MIS-Elective
IT-MSC-2MMM-Elective
IT-MSC-2MPV2ndCompulsory
IT-MSC-2MSK2ndCompulsory-Elective - group C
MITAINADE1stCompulsory
MITAINBIO1stCompulsory
MITAINCPS1stCompulsory
MITAINEMB1stCompulsory
MITAINGRI-Compulsory
MITAINHPC1stCompulsory
MITAINIDE1stCompulsory
MITAINISD-Compulsory
MITAINISY-Compulsory
MITAINMAL1stCompulsory
MITAINMAT-Compulsory
MITAINNET1stCompulsory
MITAINSEC-Compulsory
MITAINSEN1stCompulsory
MITAINSPE1stCompulsory
MITAINVER-Compulsory
MITAINVIZ1stCompulsory
Language of Instruction:Czech
Credits:5
Completion:credit+exam (written)
Type of
instruction:
Hour/semLecturesSeminar
Exercises
Laboratory
Exercises
Computer
Exercises
Other
Hours:26001214
 ExamsTestsExercisesLaboratoriesOther
Points:60150025
Guarantor:Jaroš Jiří, doc. Ing., Ph.D. (DCSY)
Deputy guarantor:Sekanina Lukáš, prof. Ing., Ph.D. (DCSY)
Lecturer:Jaroš Jiří, doc. Ing., Ph.D. (DCSY)
Instructor:Bordovský Gabriel, Ing. (DCSY)
Jaroš Marta, Ing. (DCSY)
Faculty:Faculty of Information Technology BUT
Department:Department of Computer Systems FIT BUT
Follow-ups:
Design of External Adapters and Embedded Systems (NAV), DCSY
Graphic and Multimedia Processors (GMU), DCSY
Schedule:
DayLessonWeekRoomStartEndLect.Gr.Groups
Moncomp.lablecturesO204 11:0012:501MIT 2MIT xx
MonlecturelecturesE104 E105 E112 14:0015:501MIT 2MIT MPV xx
Moncomp.lablecturesO204 18:0019:501MIT 2MIT xx
Tuecomp.lablecturesO204 12:0013:501MIT 2MIT xx
Wedcomp.lablecturesO204 14:0015:501MIT 2MIT xx
Wedcomp.lablecturesO204 16:0017:501MIT 2MIT xx
Wedcomp.lablecturesO204 18:0019:501MIT 2MIT xx
Thucomp.lablecturesO204 08:0009:501MIT 2MIT xx
Thucomp.lablecturesO204 10:0011:501MIT 2MIT xx
Thucomp.lablecturesO204 12:0013:501MIT 2MIT xx
Thucomp.lablecturesO204 14:0015:501MIT 2MIT xx
Thucomp.lablecturesO204 16:0017:501MIT 2MIT xx
Thucomp.lablecturesO204 18:0019:501MIT 2MIT xx
Fricomp.lablecturesO204 08:0009:501MIT 2MIT xx
Fricomp.lablecturesO204 10:0011:501MIT 2MIT xx
Fricomp.lablecturesO204 12:0013:501MIT 2MIT xx
 
Learning objectives:
  To familiarize yourself with the architecture of modern computational systems based on x86, ARM and RISC-V multicore processors in configurations with uniform (UMA) and non-uniform (NUMA) shared memory, often accompanied with a GPU accelerator. To understand hardware aspects of computational systems that have a significant impact on the application performance and power consumption. To be able to assess computing possibilities of a particular architecture and to predict the performance of applications. To clarify the role of a compiler and its cooperation with processors. To be able to orientate oneself on the computational system market, to evaluate and compare various systems.
Description:
  The course covers architecture of modern computational systems composed of universal as well as special-purpose processors and their memory subsystems. Instruction-level parallelism is studied on scalar, superscalar and VLIW processors. Then the processors with thread-level parallelism are discussed. Data parallelism is illustrated on SIMD streaming instructions and on graphical processors. Programming for shared memory systems in OpenMP follows and then the most proliferated multi-core multiprocessors and the advanced NUMA systems are described. Finally, the generic architecture of the graphics processing units and basic programming techniques using OpenMP are also covered. Techniques of  low-power processors are also explained.
Knowledge and skills required for the course:
  Von-Neumann computer architecture, computer memory hierarchy, cache memories and their organization, programming in assembly and in C/C++, compiler's tasks and functions.
Subject specific learning outcomes and competencies:
  Overview of the architecture of modern computational systems, their capabilities, limits and future trends. The ability to estimate performance of software applications on a given computer system, identify performance issues and propose their rectification. Practical user experience with supercomputers.
Generic learning outcomes and competencies:
  Understanding of hardware limitations having impact on the efficiency of software solutions. 
Why is the course taught:
  There's a large range of problems and programming languages, where the performance of the final application, the amount of consumed memory or electric power is not significant. However, what shall we do in situations where these aspects are of critical importance?
The purpose of the AVS course is to examine and analyze the architecture of current multi-core super-scalar processors, memory subsystems and accelerator cards such as GPUS in order to understand their potential and limits. The practical part of the course is devoted to teaching the OpenMP library allowing efficient parallelization and vectorization on both CPUs and GPUs.
Syllabus of lectures:
 
  1. Scalar processors, pipelined instruction processing and compiler assistance.
  2. Superscalar processors, dynamic instruction scheduling.
  3. Data flow through the hierarchy of cache memories. 
  4. Branch prediction, optimization of instruction and data fetching.
  5. Processors with data level parallelism.
  6. Multi-threaded and multi-core processors.
  7. Loop parallelism and code vectorization.
  8. Functional parallelism and acceleration of recursive algorithms.
  9. Synchronization on systems with shared memory.
  10. Algorithm for cache coherency.
  11. Architectures with distributed shared memory .
  12. Architecture and programming of graphics processing units.
  13. Low power processors and techniques.
Syllabus of computer exercises:
 
  1. Anselm and Salomon supercomputer intro.
  2. Performance measurement for sequential codes, Roof-line model and Amdahl's law.
  3. Problem decomposition and cache blocking.
  4. Vectorisation using OpenMP.
  5. Loops and tasks using OpenMP
  6. Functional parallelism and synchronization using OpenMP.
Syllabus - others, projects and individual work of students:
 
  • Performance evaluation and code optimization using OpenMP.
  • Development of an application in OpenMP on a NUMA node.
Fundamental literature:
 
  • Baer, J.L.: Microprocessor Architecture. Cambridge University Press, 2010, 367 s., ISBN 978-0-521-76992-1.
  • Hennessy, J.L., Patterson, D.A.: Computer Architecture - A Quantitative Approach. 5. vydání, Morgan Kaufman Publishers, Inc., 2012, 1136 s., ISBN 1-55860-596-7. 
  • van der Pas, R., Stotzer, E., and Terboven, T.: Using OpenMP-The Next Step, MIT Press Ltd, ISBN 9780262534789, 2017.
Study literature:
 
Controlled instruction:
  
  • Missed labs can be substituted in alternative dates.
  • There will be a place for missed labs in the last week of the semester.
Progress assessment:
  Assessment of two projects, 14 hours in total and, computer laboratories and a midterm examination.
Exam prerequisites:
  To get 20 out of 40 points for projects and midterm examination.
 

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