Advanced Digital Systems

IT-MSC-2MBI-Compulsory-Elective - group C
IT-MSC-2MGM-Compulsory-Elective - group C
Language of Instruction:Czech
Completion:examination (written)
Type of
Guarantor:Fučík Otto, doc. Dr. Ing. (DCSY)
Lecturer:Kořenek Jan, doc. Ing., Ph.D. (DCSY)
Martínek Tomáš, Ing., Ph.D. (DCSY)
Matoušek Jiří, Ing., Ph.D. (DCSY)
Instructor:Dvořák Milan, Ing. (DCSY)
Kajan Michal, Ing. (DCSY)
Matoušek Denis, Ing. (DCSY)
Matoušek Jiří, Ing., Ph.D. (DCSY)
Zachariášová Marcela, Ing., Ph.D. (DCSY)
Faculty:Faculty of Information Technology BUT
Department:Department of Computer Systems FIT BUT
Learning objectives:
  To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.
  This course is aimed at teaching advanced techniques of digital circuit design. Firstly, it presents a brief overview of basic approaches to modelling and simulation of digital circuits using the VHDL language and summarizes key properties of target technologies, such as ASIC and FPGA. Next, the course introduces advanced techniques of digital circuits minimization and synthesis (pipelining, retiming), which are supplemented by the application of constraints. The main part of the course is focused on modern approaches to the synthesis of digital circuits. This includes models and methods used for optimisation at logical level and with respect to target technology as well as approaches that build on synergy between synthesis and verification of digital circuits. Apart from these main topics, the course also touches some additional topics like low-power design and the verification of digital circuits based on the OVM methodology.
Knowledge and skills required for the course:
  Digital system design, basic programming skills.
Learning outcomes and competencies:
  The students are able to design complex constrained digital systems using contemporary design techniques and they know modern methods for synthesis and verification of these systems.
Syllabus of lectures:
  • Combinatorial and sequential logic design techniques, algorithms, and tools review.
  • Review of digital design target technologies (ASIC, FPGA).
  • Algorithms for minimization of digital circuits.
  • Advanced synthesis techniques (pipelining, retiming).
  • Constraint conditions.
  • Models and methods for modern synthesis of digital circuits (AIG, BDD, SAT solvers).
  • Modern synthesis of digital circuits (logic optimization).
  • Modern synthesis of digital circuits (optimization for target technology).
  • Synergy between synthesis and verification of digital circuits.
  • Low power design methodologies.
  • Reconfigurable computing.
  • Verification of digital circuits (OVM methodology).
Syllabus of computer exercises:
  • Synthesis of the basic logic circuits, pipelining, retiming.
  • Constraint conditions.
  • Synthesis of basic digital circuits using ABC tool.
  • Synthesis of advanced digital circuits using ABC tool.
  • Verification of digital circuits.
Syllabus - others, projects and individual work of students:
  • Individual project focused on synthesis of digital circuits.
Fundamental literature:
  • Khatri S. P., Gulati K. (eds.): Advanced Techniques in Logic Synthesis, Optimizations and Applications, ISBN 978-1-4419-7517-1, 2011
  • Rabaey J., Pedram M.: Low Power Design Methodologies, Kluwer, ISBN 0792396308, 1996
Study literature:
  • Lecture notes in e-format
Controlled instruction:
  Presence in any form of instruction is not compulsory. An absence (and hence loss of points) can be compensated in the following ways: 
  1. presence in another laboratory group dealing with the same task. 
  2. showing a summary of results to the tutor at the next lab. 
  3. sending a short report (summarizing the results of the missed lab and answering the questions from the assignment) to the tutor, in 14 days after the missed lab.
Progress assessment:
  Written mid-term exam and project in due dates.
Exam prerequisites:
  Requirements for class accreditation are not defined.

Your IPv4 address: